Memory Subsystem Voltage Offset Calibration After Power Events
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Solution Overview
Problem
Power events such as surges or shutdowns disrupt the temporal voltage shift dynamics in memory sub-systems, leading to inadequate read voltage offsets and increased errors in memory operations.
Innovation Solution
The memory sub-system controller initiates calibration to resynchronize family-bin associations by determining new voltage offsets for memory partitions, moving them to bins with larger offsets if necessary, and updating metadata tables to ensure accurate read operations post-power event.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the memory sub-system uses fixed voltage offsets for read operations, then the device complexity is reduced, but the reliability deteriorates following power events due to temporal voltage shift disruptions
Solution Approach 1:
The patent implements dynamic voltage offset adjustment by transitioning from fixed offsets to time-dependent offsets that automatically adapt following power events. The controller monitors temporal voltage shift patterns and adjusts read voltage offsets dynamically based on elapsed time since the last power event, enabling the system to maintain high reliability without requiring complex manual calibration procedures.
Solution Approach 2:
The patent changes the voltage offset parameter from a static fixed value to a dynamic time-dependent value. By introducing time as a variable parameter, the system automatically adjusts read voltage offsets based on the temporal characteristics of voltage drift after power events, resolving the contradiction between simplicity and reliability.
2Reliability
If calibration is performed frequently to maintain accurate voltage offsets, then the reliability is improved, but the productivity deteriorates due to increased calibration overhead
Solution Approach 1:
The patent implements periodic calibration triggered by specific events (power events) rather than continuous or frequent calibration. The system performs calibration at strategically determined intervals based on temporal voltage shift patterns, maintaining high read operation accuracy while minimizing calibration overhead and maximizing operational efficiency.
Solution Approach 2:
The patent performs calibration proactively in response to power events before read operations are affected by significant voltage drift. By anticipating and addressing voltage offset issues at their source (power events), the system maintains reliability without requiring frequent corrective calibration cycles that would reduce productivity.
3Reliability
If the system applies large voltage offsets to compensate for temporal voltage shift, then the reliability is improved, but the energy consumption increases
Solution Approach 1:
The patent dynamically adjusts voltage offset parameters based on the actual temporal voltage shift characteristics and elapsed time since power events. By optimizing the offset magnitude to match actual drift patterns rather than applying excessive fixed offsets, the system achieves robust read operations with minimized energy consumption.
Solution Approach 2:
The patent implements feedback mechanisms that monitor actual voltage drift patterns and adjust offset magnitudes accordingly. The controller uses information about temporal voltage shift behavior to fine-tune read voltage offsets, ensuring sufficient compensation for reliability while avoiding excessive voltage application that would waste energy.
Data Source
AI summary
Disclosed is a system including a memory device having a plurality of physical cells and a processing device, operatively coupled with the memory device. The processing device maintains association of block families with a first (second, etc.) bin of a plurality of bins, each of the plurality of bins associated with one or more read voltage offsets. The read voltage offsets are used to compensate for a temporal read voltage shift caused by a charge loss by memory cells of the block families. Responsive to an occurrence of a power event, the processing device performs diagnostics of one or more blocks of various block families and determines whether to maintain association of the block families with current bins of the respective block families or to associate the block families with different bins.