Semiconductor Memory Progressive Failure Detection via Voltage Recovery

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Semiconductor memory devices face progressive failures during use, which are difficult to detect and address, leading to data loss and reduced reliability, as existing methods do not effectively identify or mitigate these failures until they occur.

Innovation Solution

A method and system for detecting progressive failures in semiconductor memory devices by applying specific voltage sequences to word lines, including a read voltage, a first pass voltage, and a second pass voltage, to identify voltage recovery issues indicative of potential failures, and performing re-program operations to relocate data from faulty areas.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional read operations are performed without progressive failure detection, then operation speed is maintained, but reliability deteriorates due to undetected failures

Engineering Contradiction:
Improvememory reliabilityVSAvoidoperation complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by performing progressive failure detection operations before actual data read operations. The system checks for voltage recovery issues and progressive failures in advance, identifying problematic word lines prior to critical data retrieval, thereby preventing potential data loss while maintaining normal operation flow.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent implements feedback mechanisms by monitoring voltage levels on word lines during and after program operations. The system compares actual voltage recovery against expected values and uses this feedback to detect progressive failures, enabling real-time reliability monitoring and adjustment of subsequent operations.

Inventive Principle:
Principle #23Feedback

2Measurement precision

If multiple voltage passes are applied to detect progressive failure, then detection precision is improved, but operation time increases

Engineering Contradiction:
Improvefailure detection precisionVSAvoiddetection time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The patent applies parameter changes by varying voltage levels across multiple passes (first pass voltage, second pass voltage at higher level) to detect progressive failures. Each voltage level provides different detection sensitivity, allowing the system to identify failures that may not be detected at lower voltage thresholds while managing the time required for multi-level measurement.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If word line voltage recovery is monitored closely, then reliability is improved, but energy consumption increases

Engineering Contradiction:
Improvedata integrityVSAvoidenergy consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent applies partial action by monitoring voltage recovery only on specific word lines that show signs of progressive failure or are suspected of having issues, rather than continuously monitoring all word lines. This selective monitoring approach maintains reliability for at-risk areas while reducing overall energy consumption compared to comprehensive continuous monitoring.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS9502126B1Memory system and operating method thereof
Publication Date: 2016.11.22 SK HYNIX INC
  • US9502126B1 patent drawing
  • US9502126B1 patent drawing
  • US9502126B1 patent drawing

AI summary

A method of operating a semiconductor memory device includes applying a read voltage to a selected word line on which a program operation is performed; applying a first pass voltage to at least one unselected word line adjacent to the selected word line; applying a second pass voltage to the at least one unselected word line when a first reference time elapses; and performing a read operation on memory cells connected to the selected word line according to the read voltage when a second reference time elapses.