Memory Device Voltage Generation Rising Time Control

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Solution Overview

Problem

Existing memory devices face challenges in ensuring reliability when generating operating voltages, particularly when using external voltages, leading to inconsistencies in voltage rising times and increased fail bits during operations.

Innovation Solution

A memory device and method that allow for operation in both internal and external voltage modes, with a control logic to measure and adjust the rising time of the operating voltage and adjust the resistance value of the reception circuit based on comparisons between internal and external voltage operations, ensuring consistent voltage generation and reduced fail bits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If the operating voltage is generated using an external voltage, then the voltage generation speed is improved, but the reliability of the memory device deteriorates due to inconsistent rising times

Engineering Contradiction:
Improvevoltage generation speedVSAvoidreliability of memory device
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies dynamics by making the rising time of the operating voltage adjustable rather than fixed. The control logic dynamically sets the rising time based on the voltage generation mode (internal or external voltage) to ensure consistent timing characteristics. This allows the system to adapt the voltage generation process to maintain reliability while utilizing the speed benefits of external voltage generation.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the parameter of rising time based on the voltage generation mode. When external voltage is used, the control logic adjusts the rising time parameter to match or exceed the rising time of internal voltage generation. This parameter adjustment ensures that the operating characteristics remain consistent regardless of the voltage source, thereby maintaining reliability while allowing faster external voltage generation.

Inventive Principle:
Principle #35Parameter changes

2Productivity

If the rising time of the operating voltage is shortened to improve operation speed, then the productivity is improved, but the reliability deteriorates due to increased fail bits

Engineering Contradiction:
Improveoperation speedVSAvoidfail bit rate
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements feedback by having the control logic monitor and compare the rising times of operating voltage generated from internal and external voltage sources. Based on this feedback comparison, the system adjusts the rising time parameter to ensure that external voltage generation meets or exceeds the timing characteristics of internal voltage generation. This feedback mechanism ensures that productivity improvements do not compromise reliability.

Inventive Principle:
Principle #23Feedback

3Adaptability or versatility

If the memory device operates in dual mode (internal and external voltage), then the adaptability is improved, but the device complexity increases due to additional control logic

Engineering Contradiction:
Improvevoltage generation flexibilityVSAvoidcontrol logic complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent applies universality by designing the voltage generation circuit to perform multiple functions - it can generate operating voltage from both internal voltage sources and external voltage sources. The control logic is designed to handle both modes through a unified approach, comparing rising times and adjusting parameters accordingly. This multi-functionality provides adaptability while keeping the control structure relatively simple and manageable.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS11227664B2Memory device and method of operating the same
Publication Date: 2022.01.18 SK HYNIX INC
  • US11227664B2 patent drawing
  • US11227664B2 patent drawing
  • US11227664B2 patent drawing

AI summary

Provided herein is a memory device and a method of operating the same. The memory device may include a memory block, a voltage generation circuit configured to operate in a first mode in which an operating voltage is generated using an internal voltage or a second mode in which the operating voltage is generated using an external voltage, and to provide the operating voltage to the memory block, and a control logic configured to measure and store a first rising time during which the operating voltage rises to a target level in the first mode, and to control the voltage generation circuit so that a second rising time during which the operating voltage rises to the target level in the second mode is equal to or longer than the first rising time.