Memory Sub-System Voltage Degradation Detection via Self-Test
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Solution Overview
Problem
Existing approaches fail to reliably detect input voltage degradation in memory sub-systems due to variations in operational environments and over the lifetime of the system, particularly in densely packed components, leading to potential functional failures.
Innovation Solution
Implementing a self-initiated test memory operation in the memory sub-system to detect input voltage or current, using a sensor circuit to monitor voltage and current levels, and comparing them to predefined degradation criteria to generate management control signals for timely servicing or replacement.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If memory sub-systems are densely packed to increase storage capacity, then productivity is improved, but input voltage degradation occurs leading to reduced reliability
Solution Approach 1:
The patent performs self-initiated test memory operations before normal operations to detect input voltage degradation early. The controller proactively monitors voltage levels by executing test reads and comparing results against reference values, enabling preventive maintenance before functional failures occur in densely packed memory sub-systems
Solution Approach 2:
The patent implements a feedback mechanism where the controller continuously monitors input voltage through self-initiated test operations and adjusts or alerts based on detected degradation. The system compares test read results with reference values and generates alerts when voltage degradation thresholds are exceeded, creating a closed-loop monitoring system that maintains reliability in high-density configurations
2Reliability
If self-initiated test memory operations are implemented to detect input voltage degradation, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent utilizes existing memory cells and controller resources to perform dual functions: normal data storage/retrieval and self-diagnostic test operations. The same memory array and controller logic are used for both operational data handling and voltage degradation detection, eliminating the need for separate dedicated test hardware and reducing overall device complexity
Solution Approach 2:
The controller autonomously initiates and executes test memory operations without requiring external host intervention. The system self-monitors its own input voltage by performing self-initiated test reads, comparing results against internally stored reference values, and generating alerts when degradation is detected, making the system self-diagnostic and reducing external monitoring requirements
Data Source
AI summary
A method includes performing a self-initiated test memory operation of a memory device in a memory sub-system and detecting, via a sensor circuit, an input voltage or input current of the memory device or the memory sub-system. The method further includes determining whether the input voltage or the input current meets a degradation criteria and generating a management control signal responsive based on the determination whether the input voltage or the input current meets the degradation criteria.