Nonvolatile Memory Voltage Suppression Circuit
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Solution Overview
Problem
In cross-point type semiconductor memory devices, the measured current is reduced due to a decrease in applied voltage on the selected memory cell, leading to a decreased reading margin caused by voltage fluctuations on the selected bit line during the reading operation.
Innovation Solution
A nonvolatile semiconductor memory device with a circuit that includes a voltage suppressor circuit and a second voltage control circuit to stabilize the voltage applied to the word lines and bit lines, using a detection circuit to monitor voltage fluctuations based on data patterns and adjust the voltage suppressor circuit to maintain a consistent voltage difference, thereby preventing unnecessary current leaks and enhancing the reading margin.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a voltage is applied to the selected bit line during reading operation, then the resistance state of the selected memory cell can be detected, but voltage fluctuations occur on the selected bit line causing the measured current to decrease and reading margin to reduce
Solution Approach 1:
The patent employs feedback mechanisms through voltage suppressor circuits that monitor the voltage on selected bit lines and adjust the supply voltage dynamically. The detection circuit measures voltage fluctuations, and the voltage suppressor circuit compensates by adjusting the second voltage supplied to word lines and unselected bit lines, thereby maintaining stable voltage differences and preventing current measurement errors.
Solution Approach 2:
The patent changes the voltage parameters dynamically during reading operations. By adjusting the second voltage based on detected voltage fluctuations and data patterns, the system maintains optimal voltage differences across memory cells. This parameter adjustment prevents voltage-induced current leaks and ensures accurate current measurement for reading the memory state.
2Measurement precision
If voltage is supplied to word lines and bit lines for reading operation, then the memory cell resistance state can be measured, but voltage fluctuations cause unnecessary current leaks
Solution Approach 1:
The voltage suppressor circuit uses feedback from the detection circuit to monitor and compensate for voltage fluctuations. By dynamically adjusting the second voltage based on real-time voltage measurements and data patterns, the system prevents voltage-induced current leaks while maintaining accurate resistance state detection.
Solution Approach 2:
The system performs preliminary voltage suppression by detecting voltage fluctuations before they cause significant current leaks. The voltage suppressor circuit proactively adjusts voltages based on detected patterns, preventing energy loss before it occurs during the reading operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively suppresses voltage fluctuations on the selected bit line, maintaining a consistent voltage difference across the memory cell, which increases the reading margin and prevents unnecessary current leaks, thereby improving the accuracy and reliability of the memory device.
Implementation Method 1
a plurality of memory cells each having a variable resistive element for storing information according to an electric resistance change
Implementation Method 2
a voltage suppressor circuit for suppressing the fluctuation of the second voltage with respect to each word line and bit line
Implementation Method 3
detecting fluctuation of a voltage of the selected bit line depending on a data pattern stored in the memory cell array
Data Source
AI summary
A nonvolatile semiconductor memory device comprises a memory cell array in which memory cells are arranged in a row and column direction, a circuit for applying a first voltage to a selected bit line, a circuit for applying a second voltage to unselected bit lines and word lines, a circuit for reading a current flowing in a selected memory cell, a voltage suppressor circuit for suppressing fluctuation of the second voltage with respect to each word line and bit line provided in the circuit for applying the second voltage, and a second voltage control circuit for applying the first voltage to the selected bit line and a dummy second voltage to the unselected bit lines and the word lines during the preset period and controlling the voltage suppressor circuit during a reading period so that the second voltage may fluctuate in a fluctuation direction of the first voltage.