Memory Block Voltage Switching for Low-Power Data Retention

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Solution Overview

Problem

Current microcontroller systems consume significant power due to the use of a single voltage for all memory cells, even though some cells could operate at lower voltages without compromising data retention.

Innovation Solution

A system that includes a memory module with multiple memory blocks, a voltage generation module providing multiple voltage rails, and multiplexors that dynamically switch between these voltage rails based on operational parameters of each memory block, such as manufacturing process corners, temperature, and operating modes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a single high voltage level is applied to all memory cells to ensure data retention for worst-case bitcells, then data retention reliability is improved, but power consumption increases significantly for good bitcells that could operate at lower voltages

Engineering Contradiction:
Improvedata retention reliabilityVSAvoidpower consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The memory array is divided into multiple segments or regions, each capable of operating at different voltage levels. Good bitcells are segmented into low-voltage regions while worst-case bitcells remain in high-voltage regions, allowing differential voltage application that reduces overall power consumption while maintaining data retention reliability for all segments

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different voltage levels are applied to different spatial regions of the memory array based on local bitcell characteristics. Good bitcells receive lower voltage locally while worst-case bitcells receive higher voltage locally, eliminating the need to apply high voltage globally and thereby reducing power consumption while preserving data retention reliability

Inventive Principle:
Principle #3Local quality

2Device complexity

If a single voltage level is used for all memory blocks, then device complexity is reduced, but power consumption cannot be optimized for individual memory block characteristics

Engineering Contradiction:
Improvevoltage control complexityVSAvoidpower consumption
Core Design Contradiction:
Device complexityVSUse of energy by moving object

Solution Approach 1:

The voltage control system is made dynamic by introducing multiplexors that can switch between different voltage rails based on operational parameters. This allows the system to adapt voltage levels to individual memory block characteristics during operation, optimizing power consumption without requiring overly complex static voltage control circuitry

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

Multiplexors are introduced as intermediary components between the voltage generation module and memory blocks. These multiplexors act as mediators that dynamically select appropriate voltage levels based on operational parameters, enabling fine-grained power optimization while keeping the overall system architecture relatively simple

Inventive Principle:
Principle #24Intermediary (Mediator)

3Use of energy by moving object

If voltage is reduced for good bitcells, then power consumption is reduced, but data retention reliability may be compromised for those bitcells

Engineering Contradiction:
Improvepower consumptionVSAvoiddata retention reliability
Core Design Contradiction:
Use of energy by moving objectVSReliability

Solution Approach 1:

The operating voltage parameter is changed differentially for different bitcell groups based on their electrical characteristics. Good bitcells operate at lower voltage parameters while worst-case bitcells operate at higher voltage parameters, allowing power consumption to be reduced for good bitcells without compromising their data retention reliability

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS12255647B2Memory module with fine-grained voltage adjustment capabilities
Publication Date: 2025.03.18 AMBIQ MICRO INC
  • US12255647B2 patent drawing
  • US12255647B2 patent drawing
  • US12255647B2 patent drawing

AI summary

Embodiments of the disclosure are directed to a system having a memory module, a voltage generation module, and a plurality of multiplexors. The memory module has a plurality of memory blocks. The voltage generation module supplies two or more voltage rails. The multiplexors are electrically connected to the voltage generation module. Each memory block is electrically connected to one of the multiplexors. Each multiplexor is configured to switch between the two or more voltage rails based on an operational parameter of each memory block. The operational parameter of each memory block may be process control speed, storage status, an operating mode, temperature, or any combination thereof. The operating mode may further be an active mode, a standby mode, and a deep sleep mode.