Nonvolatile Memory Voltage Control Logic

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Solution Overview

Problem

Current nonvolatile memory devices face inefficiencies in programming and reading operations due to the need for multiple voltage applications across different memory stacks, which increases operation time and reduces performance.

Innovation Solution

A nonvolatile memory device with a stack manager that determines and applies a single set of voltages across multiple memory stacks, allowing for sequential programming and reading operations by using the same voltage levels for cells with similar characteristics, thereby reducing the number of voltage applications required.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multiple voltage applications are used across different memory stacks for programming and reading operations, then each memory stack can be operated independently, but the operation time increases and performance decreases

Engineering Contradiction:
Improveindependent operation of memory stacksVSAvoidoperation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent merges the voltage application control for multiple memory stacks into a unified system. The control logic determines a single set of voltages that can be applied across multiple memory stacks simultaneously, combining what were previously separate voltage application operations into one coordinated action, thereby reducing total operation time while maintaining reliable independent operation of each stack

Inventive Principle:
Principle #5Merging (Combining)

2Adaptability or versatility

If multiple voltage applications are used across different memory stacks, then specific voltage levels can be optimized for each stack, but the device complexity and number of voltage applications increase

Engineering Contradiction:
Improvevoltage optimization for each memory stackVSAvoidnumber of voltage applications
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The control logic is designed with universal functionality to handle multiple memory stacks. It can determine a single set of voltages that serves multiple stacks simultaneously, making the voltage application system multi-functional rather than requiring separate dedicated voltage control circuits for each stack, thereby reducing device complexity while maintaining adaptability

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If a single set of voltages is applied across multiple memory stacks, then operation time is reduced and performance is improved, but the ability to optimize voltage levels for each specific stack is limited

Engineering Contradiction:
Improveprogramming and reading speedVSAvoidvoltage level optimization
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The control logic dynamically adjusts voltage parameters based on the operational requirements. By determining a single set of voltages that can be applied across multiple stacks, the system changes the voltage parameters in a coordinated manner that maintains optimal performance for all stacks involved, achieving both speed improvement and adequate voltage optimization

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10971210B2Nonvolatile memory device and operating method of the same
Publication Date: 2021.04.06 SAMSUNG ELECTRONICS CO LTD
  • US10971210B2 patent drawing
  • US10971210B2 patent drawing
  • US10971210B2 patent drawing

AI summary

A nonvolatile memory device includes a memory cell region including a first metal pad, and a peripheral circuit region including a second metal pad and vertically connected to the memory cell region by the first metal pad and the second metal pad. The memory cell region includes a first memory stack comprising first memory cells vertically stacked on each other, and a second memory stack comprising second memory cells vertically stacked on each other. The peripheral circuit region includes a control logic for setting a voltage level of a second voltage applied for a second memory operation to a second memory cell of the second memory cells based on a first voltage applied to a first memory cell of the first memory cells in a first memory operation. Cell characteristics of the first memory cell are determined using the first voltage.