Memory Voltage Window Adjustment for Wear-Induced Bit Errors
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Solution Overview
Problem
Existing memory sub-systems face challenges in maintaining a stable voltage window due to factors like temperature and wear cycling, leading to increased bit error rates and reduced system performance.
Innovation Solution
A memory sub-system capable of dynamically adjusting the voltage window in response to bit error rates exceeding a threshold, using a check operation to ensure the adjusted window achieves an acceptable error rate, thereby preventing premature retirement of memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the voltage window is kept fixed, then the memory sub-system operates with simple control logic, but the bit error rate increases due to temperature and wear cycling variations
Solution Approach 1:
The patent implements dynamic voltage window adjustment by monitoring bit error rates and automatically modifying the voltage window parameters in response to detected errors. The system transitions from a static voltage window to a dynamic one that adapts to changing conditions such as temperature and wear cycling, thereby maintaining reliability without requiring complex manual intervention
Solution Approach 2:
The system employs feedback mechanisms by continuously monitoring bit error rates during memory operations and using this information to adjust the voltage window. The feedback loop detects when error rates exceed thresholds and triggers voltage window modifications, creating a closed-loop control system that automatically maintains optimal performance
2Reliability
If memory cells are retired when error rates exceed threshold, then system reliability is maintained, but usable memory capacity is reduced
Solution Approach 1:
Instead of retiring memory cells when error rates exceed thresholds, the system changes the voltage window parameters to accommodate the degraded cells. By adjusting voltage levels, pulse durations, and step sizes, the system maintains reliable operation of previously unusable cells, thereby increasing usable memory capacity while preserving system reliability
3Reliability
If the voltage window is adjusted to reduce bit error rates, then memory cell reliability improves, but the system complexity increases
Solution Approach 1:
The system implements self-service by automatically detecting bit error rates and adjusting voltage window parameters without external intervention. The memory sub-system monitors its own performance and performs self-correction through voltage adjustments, reducing the need for complex external control mechanisms while improving reliability
Data Source
AI summary
An example system can include a memory component and a processing device. The memory component can include a group of memory cells. The processing device can be coupled to the memory component. The processing device can be configured to use a first voltage window for a set of memory cells of the group of memory cells during a first time period. The processing device can be configured to determine that an error rate of a sub-set of the set of memory cells is above a threshold error rate. The processing device can be configured to, in response to the determination that the error rate of the sub-set of memory cells is above the threshold error rate, use a second voltage window for the set of memory cells of the group of memory cells during a second time period.