Memory Device Voting Circuit for Signal Error Correction
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Solution Overview
Problem
Memory devices face challenges in accurately identifying and transmitting valid signals across multiple channels due to potential errors, making it difficult to determine the correct channel for signal transmission and reception.
Innovation Solution
A memory device is designed with a logic circuit, output circuit, first and second logic gates, and a multiplexer that perform specific logic operations on received signals, allowing for flexible signal voting based on initial values and error types, ensuring valid signal output even with faulty pins.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple spare channels are added to improve signal transmission reliability, then the ability to transmit and receive signals is improved, but the complexity of accurately voting the valid channel increases
Solution Approach 1:
The voting circuit is divided into multiple independent logic gates (first logic gate, second logic gate, third logic gate, fourth logic gate) that each perform specific voting functions. Each logic gate processes specific combinations of input signals, allowing the complex voting task to be broken down into simpler, manageable segments that can be implemented with standard logic components.
Solution Approach 2:
The patent implements dynamic voting by allowing the voting result to change based on the initial values of the input signals. The logic gates are configured to produce different output signals (third signal, fourth signal, fifth signal, sixth signal) depending on the initial state of the first and second input signals, enabling the system to adaptively select the valid channel based on real-time signal conditions.
2Device complexity
If fixed voting methods are used for error correction, then the voting process is simple, but the ability to accurately identify valid signals according to different error types is reduced
Solution Approach 1:
Different logic gates are assigned different voting strategies based on the specific error conditions they detect. The first logic gate uses one voting approach for certain error types, while the second logic gate uses a different approach for other error types. This allows each gate to be optimized for its specific function, improving overall identification accuracy without requiring a completely complex unified system.
Solution Approach 2:
The voting circuit changes its operational parameters based on the initial values of the input signals. When the initial values of the first and second signals differ, the circuit activates different logic gates with different voting thresholds and rules. This dynamic adjustment of voting parameters allows accurate identification of valid signals across multiple error scenarios while maintaining reasonable circuit complexity.
Data Source
AI summary
Disclosed is a memory device, which includes a logic circuit that receives a first signal and a second signal from an external host, an output circuit that receives a first logic operation result or a second logic operation result from the logic circuit, a first logic gate that receives the first signal or the second signal and performs a third logic operation to output a third signal, a second logic gate that receives the first signal and the second signal and performs a fourth logic operation to output a fourth signal, and a multiplexer that receives the third signal and the fourth signal, receives the first logic operation result or the second logic operation result from the output circuit, and outputs one of the third signal and the fourth signal as a fifth signal in response to the first or second logic operation results.