Voting Scheme for Memory Page Inversion Bit Detection
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Solution Overview
Problem
Current memory devices require significant memory space and resources to implement inversion bit technologies for error correction and bit flipping, leading to increased die size and complexity, while existing solutions fail to efficiently reduce memory resource usage and die size effectively.
Innovation Solution
The implementation of a voting scheme in a memory page that utilizes inversion bits to determine whether data bits are inverted, allowing for reduced memory usage by directly routing inversion bits from sense amplifiers to a voting circuit, eliminating the need for data line multiplexers and optimizing inversion bit placement with respect to row addresses rather than column addresses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If inversion bits are implemented using conventional memory space allocation, then error correction capability is improved, but memory resource usage and die size increase
Solution Approach 1:
The patent makes data lines multi-functional by using them to transport both data bits and inversion bits during different time periods. The same physical data lines serve dual purposes: carrying user data during write operations and carrying inversion bits during read operations, thereby eliminating dedicated inversion bit lines and reducing overall memory resource requirements while maintaining error correction capability
Solution Approach 2:
The patent implements dynamic time-multiplexing where the function of data lines changes over time. During write operations, data lines carry data bits; during read operations, the same data lines carry inversion bits. This temporal separation allows the system to adapt the function of existing resources dynamically, reducing the need for additional static resources for inversion bit storage and transmission
2Adaptability or versatility
If data line multiplexers are used to route inversion bits, then inversion bit transport is achieved, but device complexity increases
Solution Approach 1:
The patent extracts the inversion bit transport function from the data line multiplexer structure and implements it through simpler column selection logic. Instead of using complex multiplexers to route inversion bits, the system directly selects columns containing inversion bits during read operations, eliminating the need for dedicated inversion bit multiplexing hardware and reducing overall device complexity
Solution Approach 2:
The patent introduces a column selection mechanism as an intermediary between the memory array and the inversion bit processing logic. This column selection intermediary simplifies the routing path by directly identifying and selecting columns that contain inversion bits, avoiding the need for complex multiplexer networks and reducing the intermediary components required for inversion bit transport
3Ease of manufacture
If inversion bits are placed in column addresses, then inversion bit organization is achieved, but memory space efficiency decreases
Solution Approach 1:
The patent inverts the conventional approach by placing inversion bits in row addresses instead of column addresses. This inversion of the organizational scheme allows inversion bits to be associated with rows of data, enabling more efficient space utilization where each row can have its own inversion bits stored in dedicated memory cells within that row, rather than requiring column-based storage that consumes additional memory space
Data Source
AI summary
A system for providing a voting scheme in a memory page is disclosed. The system receives a request from a host device for data. The system identifies a memory page of a memory array of a memory device storing data bits corresponding to the requested data. The data bits are transferred from memory cells of the memory page to sense amplifiers to sense the values of the data bits. Inversion bits for the row address(es) of the memory page are transferred to a voting circuit to conduct a vote using the inversion bits. If the vote indicates that the data bits are inverted, the system flips the data bits prior to providing the data bits to the host device. If the vote indicates that the data bits are not inverted, the system provide the data bits to the host device without flipping the data bits.