Memory Device Weak Address Refresh Control
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Solution Overview
Problem
In semiconductor memory devices, weak cells with shorter data retention times can lead to data loss and decreased yield due to the need for frequent refresh operations, while strong cells with longer retention times do not require immediate refresh, resulting in inefficiencies and increased power consumption.
Innovation Solution
A memory device that selectively refreshes memory cells with data retention times shorter than a first reference time while skipping refresh operations for cells with retention times longer than a second reference time, using a weak address storage block, refresh counter, and address selection block to manage and prioritize refresh addresses.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If all memory cells are refreshed periodically at predetermined intervals, then data retention is maintained, but power consumption increases and weak cells cannot be specifically managed
Solution Approach 1:
The patent segments memory cells into two categories: weak cells (with data retention time shorter than reference time) stored in weak address storage block, and strong cells (with data retention time longer than reference time) managed by refresh counter. This segmentation allows differential refresh strategies to be applied to different cell types, reducing overall power consumption while maintaining data retention for weak cells that need it most.
Solution Approach 2:
The patent applies local quality by providing different refresh characteristics to different parts of the memory system. Weak cells receive targeted refresh operations through the weak address storage block, while strong cells are managed by the standard refresh counter. This localized approach ensures that power-consuming refresh operations are performed only where necessary, rather than uniformly across all memory cells.
2Reliability
If refresh operations are performed on all memory cells, then data loss is prevented, but operation errors may occur due to unnecessary refresh of strong cells
Solution Approach 1:
The patent segments memory cells into weak cells stored in weak address storage block and strong cells managed by refresh counter. By separating the management of these two cell types, the system can apply appropriate refresh operations only to weak cells that need them, preventing operation errors that would result from unnecessary refresh operations on strong cells while still preventing data loss in weak cells.
Solution Approach 2:
The patent implements local quality by providing different refresh characteristics to different memory cell populations. Weak cells receive targeted refresh operations through the weak address storage block to prevent data loss, while strong cells are excluded from these additional refresh operations, thereby avoiding operation errors caused by unnecessary access and refresh of cells that do not need it.
3Use of energy by moving object
If weak cells are identified and selectively refreshed, then power consumption is reduced, but device complexity increases due to additional storage blocks and address management
Solution Approach 1:
The patent segments the address management system into a refresh counter for generating counting addresses and a weak address storage block for storing weak cell addresses. This segmentation allows the system to maintain a relatively simple structure while achieving selective refresh, as the weak address storage block only needs to store addresses of cells requiring special attention rather than implementing complex sensing and classification circuitry.
Solution Approach 2:
The patent introduces an address selection block as an intermediary component that receives both counting addresses from the refresh counter and weak addresses from the weak address storage block, then selects which address to output for the refresh operation. This intermediary approach simplifies the overall system architecture by using a selection mechanism rather than requiring complex integrated management of weak cell identification and refresh scheduling.
4Reliability
If refresh commands are inputted frequently to ensure data retention, then data loss is prevented, but productivity decreases due to increased refresh overhead
Solution Approach 1:
The patent segments refresh operations into two streams: standard refresh operations managed by the refresh counter for strong cells, and targeted refresh operations for weak cells managed by the weak address storage block. This segmentation allows the memory system to maintain high productivity by performing refresh operations efficiently on strong cells while dedicating only necessary refresh cycles to weak cells, rather than uniformly refreshing all cells at high frequency.
Solution Approach 2:
The patent applies local quality by providing different refresh frequencies and timing to different cell populations. Weak cells receive refresh operations at the specific intervals they require to maintain data retention, while strong cells follow the standard refresh schedule. This localized approach maximizes productivity by avoiding excessive refresh operations on strong cells while ensuring adequate refresh of weak cells.
Data Source
AI summary
A memory device includes a plurality of memory cells, a weak address storage block suitable for storing a weak address of a weak cell of which data retention time is shorter than a reference time, among the plurality of memory cells, a refresh counter suitable for generating a counting address, and an address selection block suitable for outputting a refresh address by selecting one of the counting address and the weak address, wherein, in selecting the counting address, the address selection block selects the weak address for a predetermined period, when a value of at least one preset bit of the counting address is changed.