Non-volatile Memory Multi-state Programming Weak Boosting

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Solution Overview

Problem

Multi-state non-volatile memory devices require longer programming and verification times due to the varying rates at which cells program to different target states, with lower states completing sooner than higher states, leading to inefficiencies in programming operations.

Innovation Solution

Implementing a biasing procedure that raises the channel of each selected memory cell by an amount dependent on its target state before applying a programming pulse, allowing all cells to program at a similar rate by adjusting the word line and bit line voltages based on the target state, thereby reducing the number of pulses required for completion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If multi-state non-volatile memory is implemented to store multiple data states, then storage capacity is improved, but programming time increases

Engineering Contradiction:
Improvestorage capacityVSAvoidprogramming time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The patent applies preliminary action by performing a biasing procedure that raises the channel of each selected memory cell by an amount dependent on its target state before applying the programming pulse. This preliminary channel raising adjusts the starting potential of each cell based on where it needs to go, so that when the programming pulse is applied, all cells progress toward their target states at similar rates, completing programming in the same number of pulses regardless of target state.

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If conventional programming is used without state-dependent biasing, then device complexity is low, but programming efficiency deteriorates

Engineering Contradiction:
Improveprogramming control complexityVSAvoidprogramming efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The patent applies local quality by making the channel raising amount dependent on the specific target state of each memory cell. Different cells receive different amounts of channel raising based on their individual programming needs - cells targeting lower states receive different biasing than cells targeting higher states. This localized, state-dependent approach optimizes programming speed for each cell's specific destination while maintaining overall system efficiency.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables all memory cells to finish programming in a consistent number of pulses, regardless of their target state, improving programming efficiency and reducing overall programming time by ensuring that all cells complete programming simultaneously.

Implementation Method 1

a biasing procedure that raises the channel of each selected memory cell by an amount dependent on its target state before applying a programming pulse, allowing all cells to program at a similar rate by adjusting the word line and bit line voltages based on the target state

Methodology Applied
Scientific EffectElectrical field effect: Electric Field

Data Source

PatentUS9842657B1Multi-state program using controlled weak boosting for non-volatile memory
Publication Date: 2017.12.12 SANDISK TECHNOLOGIES LLC
  • US9842657B1 patent drawing
  • US9842657B1 patent drawing
  • US9842657B1 patent drawing

AI summary

Multi-state programming of non-volatile memory cells, where cells being programmed to different target states are programmed concurrently, is performed by modulating the program speed of each state using a controlled amount of state-dependent weak boosting in their respective channels. In one example, the channel boosting is controlled by using a multi-stair word line ramp in conjunction with raising of the voltage on bit lines at a time based on the corresponding memory cell's target state.