Memory Wear Leveling Pools for Critical Data Endurance

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Solution Overview

Problem

Non-volatile memory devices experience uneven wear due to differential access frequencies of memory blocks, leading to premature failure and loss of critical data, particularly in automotive systems.

Innovation Solution

Implementing wear leveling techniques that distribute access operations evenly across memory blocks by partitioning them into subsets based on criticality and usage frequency, using a controller to manage and allocate data to specific subsets to extend the lifespan of critical data storage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If wear leveling is not implemented, then memory blocks with high access frequency can be accessed quickly, but memory blocks will experience uneven wear leading to premature failure

Engineering Contradiction:
Improvememory block lifespanVSAvoidmemory management complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The memory device is segmented into multiple wear leveling pools, each containing multiple memory blocks. This segmentation allows the controller to distribute write operations across different pools, preventing any single pool from experiencing excessive wear. The segmentation strategy directly addresses the uneven wear problem by creating manageable units that can be independently managed and rotated.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The wear leveling system dynamically selects which wear leveling pool to use for each write operation based on current wear states and access patterns. The controller continuously monitors and adjusts the distribution of data across pools, making the system adaptive to changing conditions. This dynamic approach ensures optimal wear distribution while maintaining system reliability.

Inventive Principle:
Principle #15Dynamics

2Speed

If data is stored in frequently accessed memory blocks, then data access speed is improved, but those memory blocks wear out faster

Engineering Contradiction:
Improvedata access speedVSAvoidmemory block endurance
Core Design Contradiction:
SpeedVSDuration of action of stationary object

Solution Approach 1:

The system performs preliminary wear leveling by proactively distributing data across multiple wear leveling pools before any single pool becomes excessively worn. The controller anticipates wear accumulation and redistributes data in advance, preventing premature failure of frequently accessed blocks. This preliminary action maintains both fast access speeds and extended endurance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

When a wear leveling pool reaches a certain wear threshold, the system discards it from active use and recovers it by redistributing its data to other pools. This allows worn blocks to be temporarily taken out of service, preventing further degradation, while the overall system continues to operate with remaining healthy pools. The discarded pools can later be recovered and reintegrated when conditions permit.

Inventive Principle:
Principle #34Discarding and recovering

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enhances the useful life of memory devices by maintaining critical data integrity and reducing the frequency of repairs, especially in automotive applications.

Implementation Method 1

applying a high positive voltage, which may be referred to as a 'program voltage,' a 'programming power voltage,' or 'VPP,' to a control gate to generate Fowler-Nordheim tunneling (referred to as 'F-N tunneling') between a floating gate and the semiconductor substrate. When F-N tunneling is occurring, electrons of the bulk area are accumulated on the floating gate by an electric field of VPP applied to the control gate to increase a threshold voltage of the memory cell.

Methodology Applied
Scientific EffectFowler-Nordheim tunneling:

Implementation Method 2

An erasing operation of the memory cell is concurrently performed in units of sectors sharing the bulk area (referred to as 'blocks' or 'memory blocks'), by applying a high negative voltage, which may be referred to as an 'erase voltage' or 'Vera,' to the control gate and a configured voltage to the bulk area to generate the F-N tunneling. In this case, electrons accumulated on the floating gate are discharged into the source area, so that the memory cells have an erasing threshold voltage distribution.

Methodology Applied
Scientific EffectFowler-Nordheim tunneling:

Data Source

PatentUS12562233B2Memory device wear leveling
Publication Date: 2026.02.24 MICRON TECHNOLOGY INC
  • US12562233B2 patent drawing
  • US12562233B2 patent drawing
  • US12562233B2 patent drawing

AI summary

A controller of a memory device may determine that an endurance parameter associated with a wear leveling pool of a memory of the memory device satisfies a threshold. The wear leveling pool includes a plurality of memory blocks of the memory. The controller may divide, based on determining that the endurance parameter satisfies the threshold, the plurality of memory blocks of the wear leveling pool into a first wear leveling pool subset that includes a first subset of the plurality of memory blocks and a second wear leveling pool subset that includes a second subset of the plurality of memory blocks. A first subset of a plurality of data partitions is stored in the first subset of the plurality of memory blocks, and a second subset of the plurality of data partitions is stored in the second subset of the plurality of memory blocks.