Memory Wear-Leveling via Address Space Remapping

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Solution Overview

Problem

In memory subsystems, chunks in unused address spaces do not participate in wear-leveling processes, leading to shorter operational life for chunks in accessible address spaces.

Innovation Solution

A wear-leveling remapper component migrates valid data from usable to unusable address spaces and remaps chunks to distribute wear evenly across all memory components, including those in unused spaces, using address translation indirection and data migration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If wear-leveling is implemented only in usable address spaces, then wear-leveling performance is improved, but operational life of memory components is reduced due to concentrated wear

Engineering Contradiction:
Improvewear-leveling performanceVSAvoidoperational life of memory components
Core Design Contradiction:
ReliabilityVSDuration of action of stationary object

Solution Approach 1:

The patent extends wear-leveling from the traditional usable address space dimension to include the unused address space dimension. By incorporating unused chunks into the wear-leveling pool, the system distributes wear across a larger address space dimension, thereby extending operational life while maintaining wear-leveling performance.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The patent introduces a remapper component as an intermediary that translates logical addresses to physical addresses, enabling transparent inclusion of unused address spaces in wear-leveling operations. This intermediary allows the system to balance wear distribution without affecting host system operations.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Duration of action of stationary object

If unused address spaces are included in wear-leveling, then operational life of memory components is extended, but device complexity increases due to address translation requirements

Engineering Contradiction:
Improveoperational life of memory componentsVSAvoidaddress translation complexity
Core Design Contradiction:
Duration of action of stationary objectVSDevice complexity

Solution Approach 1:

The remapper component performs multiple functions: it manages address translation between logical and physical addresses, orchestrates wear-leveling operations across usable and unused spaces, and handles data migration. This multi-functionality reduces the need for separate dedicated components, thereby managing complexity while achieving extended operational life.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If data migration between usable and unused address spaces is performed, then wear distribution is improved, but productivity decreases due to additional data movement operations

Engineering Contradiction:
Improvewear distributionVSAvoiddata access efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent implements wear-leveling as a periodic background operation rather than a continuous process. Data migration between usable and unused address spaces occurs at scheduled intervals or based on wear thresholds, allowing normal data access operations to proceed without interruption while still achieving improved wear distribution over time.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11768764B2Wear-leveling scheme for memory subsystems
Publication Date: 2023.09.26 MICRON TECHNOLOGY INC
  • US11768764B2 patent drawing
  • US11768764B2 patent drawing
  • US11768764B2 patent drawing

AI summary

A wear-leveling process for a memory subsystem selects a source chunk to be removed from a usable address space of the memory subsystem to distribute wear across all available chunks in the memory subsystem. The memory subsystem has a plurality of non-volatile memory components. The plurality of non-volatile memory components includes a plurality of chunks including at least one chunk in an unusable address space of the memory subsystem. The wear-leveling process copies valid data of the source chunk to a destination chunk in the unusable address space of the memory subsystem and assigns the destination chunk to a location in the usable address space of the memory subsystem occupied by the source chunk.