Background Reordering for Memory Wear-Leveling Overhead Reduction

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Solution Overview

Problem

Current wear leveling methods for storage devices, such as non-volatile memory devices, lead to reduced lifetimes due to uneven wear-out of individual storage elements, and require significant meta-information storage and overhead, which is not efficiently related to access rates and does not support fine-granular access.

Innovation Solution

A background reordering technique that uses a pseudo-random mapping function to redistribute data based on cumulative access transactions, dynamically mapping physical addresses to prevent excessive wear-out, with a Reorder Rate Controller and Data Copying Engine managing the reordering process, allowing for parallel operation with normal access transactions and reduced meta-data requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If out-of-place storage with garbage collection is used for wear leveling, then individual storage element wear is mitigated, but significant meta-information storage overhead is required

Engineering Contradiction:
Improvewear levelingVSAvoidmeta-information storage
Core Design Contradiction:
ReliabilityVSQuantity of substance

Solution Approach 1:

The patent extracts the wear-leveling function from the main data storage operation by implementing a separate background reordering process. This allows wear leveling to occur independently without requiring meta-information to be stored alongside the main data, thus mitigating wear while reducing storage overhead.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent performs preliminary reordering of data in background operations before the storage elements become worn out. By proactively redistributing data across storage elements in advance, the system prevents uneven wear without needing to track wear levels through meta-information during normal operations.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If current wear leveling methods are used, then storage element wear is balanced, but overhead grows significantly with device utilization

Engineering Contradiction:
Improvewear distributionVSAvoidoverhead
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements a self-service wear leveling mechanism where the background reordering process automatically redistributes data based on simple counters that track the number of times each storage element has been written to. This self-managing approach balances wear without requiring complex control logic or significant overhead structures.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The patent changes the approach from tracking wear levels with meta-information to using simple write-count parameters for each storage element. This parameter change enables wear balancing with minimal overhead, as the system only needs to maintain counters rather than complex data structures.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If reordering is based on wear-level of individual storage elements, then wear is balanced, but fine-granular access is not supported

Engineering Contradiction:
Improvewear balancingVSAvoidfine-granular access
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent segments the wear leveling operation from the data access operation. The background reordering process handles wear balancing at the storage element level independently, while data access operations continue to work with fine-granular sectors without being affected by the wear leveling process. This segmentation allows both wear balancing and fine-granular access to coexist.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a background reordering process as an intermediary between the host and the storage elements. This intermediary handles the wear-balancing reordering operations separately from the main data access path, allowing fine-granular access to proceed unchanged while wear is balanced in the background.

Inventive Principle:
Principle #24Intermediary (Mediator)

4Reliability

If background reordering is implemented, then wear-out is prevented and overhead is limited, but data must be copied between locations

Engineering Contradiction:
Improvewear-out preventionVSAvoiddata copying time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent implements periodic background reordering operations that occur at scheduled intervals rather than continuously. This periodic approach prevents wear-out by redistributing data over time while minimizing the impact on system performance, as the data copying occurs in background cycles rather than blocking normal operations.

Inventive Principle:
Principle #19Periodic action

Solution Approach 2:

The patent maintains continuity of useful action by performing wear-leveling reordering in the background without interrupting normal data access operations. The background process continuously redistributes data to prevent wear-out while the main system continues to serve requests, ensuring both wear prevention and minimal performance impact.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS9268686B2Background reordering—a preventive wear-out control mechanism with limited overhead
Publication Date: 2016.02.23 INTEL CORP
  • US9268686B2 patent drawing
  • US9268686B2 patent drawing
  • US9268686B2 patent drawing

AI summary

Embodiments of the present disclosure describe background reordering techniques and configurations to prevent wear-out of an integrated circuit device such as a memory device. In one embodiment, a method includes receiving information about one or more incoming access transactions to a memory device from a processor, determining that a wear-leveling operation is to be performed based on a cumulative number of access transactions to the memory device, the cumulative number of access transactions including the one or more incoming access transactions, and performing the wear-leveling operation by mapping a first physical address of the memory device to a second physical address of the memory device based on a pseudo-random mapping function, and copying information from the first physical address to the second physical address. Other embodiments may be described and/or claimed.