Semiconductor Memory Wiring Layout Symmetry Stabilization
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Solution Overview
Problem
The existing semiconductor memory devices face challenges in achieving stable drive characteristics due to variations in the wiring pattern, particularly in NAND-type flash memory, where the bit line pitch differs between the memory cell array and peripheral circuit, leading to positional shifts and asymmetry in the wiring layout, which affects the operation of the memory cell array.
Innovation Solution
The semiconductor memory device employs a wiring layout with parallel line portions and inclined line portions connecting the memory cell array and peripheral circuit, ensuring symmetry and reducing variations by using the same electron beam shot patterns for both regions, thereby stabilizing the drive current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the line pitch is increased using a lead portion while extending from the memory cell array toward the sense amplifier circuit, then the connection between memory cell array and peripheral circuit is achieved, but the wiring pattern symmetry is broken and stable drive characteristic cannot be obtained
Solution Approach 1:
The patent intentionally introduces asymmetry in the form of inclined portions to compensate for the asymmetry caused by different line pitches. The inclined portions are designed with specific angles and dimensions to balance the positional shifts between left and right wiring patterns, thereby restoring symmetry in the overall wiring layout despite the inherent asymmetry in line pitch requirements.
Solution Approach 2:
The patent modifies the wiring pattern parameters by introducing inclined portions with specific angles (e.g., 45 degrees) and controlled dimensions. These parameter changes allow the wiring pattern to accommodate different line pitches while maintaining symmetry, as the inclined portions are designed to create equal positional shifts in opposite directions.
2Ease of manufacture
If the wiring pattern is designed using inclined lines formed using triangular EB shot for convenience of design, then the design process is simplified, but positional shift and dimensional variation occur making full right and left symmetry difficult to achieve
Solution Approach 1:
The patent deliberately uses asymmetric triangular EB shots to create inclined portions that compensate for the asymmetry introduced by different line pitches. By controlling the angle and dimensions of these inclined portions, the overall wiring pattern achieves symmetry despite the asymmetric building blocks used.
Solution Approach 2:
The patent specifies precise parameters for the inclined portions, including angle (e.g., 45 degrees) and dimensions, to ensure that the positional shifts created by triangular EB shots result in symmetric overall wiring patterns. These controlled parameter changes transform the manufacturing challenge into a design advantage.
3Productivity
If the line pitch of bit line is reduced due to high integration of memory cell array, then integration density is improved, but the difference in line pitch between memory cell array and peripheral circuit increases causing wiring pattern variations
Solution Approach 1:
The patent divides the wiring pattern into distinct segments: a first portion in the memory cell array area with fine line pitch, a lead portion in the peripheral circuit area with larger line pitch, and inclined portions connecting them. This segmentation allows each segment to be optimized for its specific function while the inclined portions ensure smooth transition and maintain overall pattern consistency.
Solution Approach 2:
The patent applies different wiring pattern characteristics to different regions: the memory cell array area uses fine-pitched lines for high integration, while the peripheral circuit area uses coarser lines for ease of connection. The inclined portions are designed with specific local characteristics to bridge these different regions, ensuring that each area has the quality needed for its function while maintaining overall symmetry.
Data Source
AI summary
A semiconductor memory device includes a first wiring region and a second wiring region located adjacent to the first wiring region. First lines located in the first wiring region include a first portion, a first lead portion and first inclined portion. Second lines located in the second wiring region include a second portion, a second lead portion and a second inclined portion. The first and second portions are located in parallel with a same pitch, the first and second lead portions are located with a pitch which is larger than the pitch of the first and second portions, the first and second inclined portions extend the same direction at a predetermined angle.