Memory Word Error Correction Without Full Block Readout
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Solution Overview
Problem
Current memory technologies face inefficiencies in error detection and correction, particularly in flash memories and RAM, where one-bit errors can lead to high memory expenditure and slow access times due to the need to read entire memory blocks for error checking and correction.
Innovation Solution
A method where each data word in a memory block is associated with an error identification value and a correction value, allowing for independent error correction without requiring the entire block to be read, using parity bits and sub-correction values to minimize memory space and enhance access speed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If a small memory block is chosen as basic unit, then access speed and energy efficiency are improved, but memory expenditure for storing error correction value becomes very large compared to size of memory block
Solution Approach 1:
The patent divides the memory block into multiple data words, each with its own error identification value. This segmentation allows error checking to be performed on individual data words rather than requiring the entire block to be read, thus improving access speed while maintaining reasonable error correction overhead.
Solution Approach 2:
The patent implements error identification values (parity bits) for each data word, providing partial error detection capability at minimal overhead. This allows the system to quickly identify errors in specific data words without requiring full block reading, achieving faster access with acceptable memory expenditure.
2Quantity of substance
If a greater block unit is chosen, then additional expenditure for error code becomes tolerable, but access becomes very slow and energy-intensive due to requirement of reading entire block
Solution Approach 1:
By segmenting the memory block into multiple data words with individual error identification values, the patent enables selective reading and error checking of only the necessary data words. This eliminates the need to read the entire block for error verification, significantly reducing access time and energy consumption while maintaining tolerable error code overhead.
Solution Approach 2:
The patent extracts the error identification functionality from the block-level operation and implements it at the data word level. Each data word has its own error identification value, allowing error detection to be performed independently on individual words without requiring full block access, thus resolving the contradiction between error code overhead and access speed.
3Reliability
If error correction code is implemented for entire memory block, then error correction capability is provided, but entire block must be read to check individual datum which produces time lag
Solution Approach 1:
The patent segments the error correction functionality by assigning error identification values to individual data words within the block. This allows the system to quickly identify errors in specific data words using their associated error identification values, eliminating the need to read the entire block for error checking and thus removing the time lag while maintaining error correction capability.
Solution Approach 2:
The patent performs preliminary error identification by storing error identification values with each data word. When a data word needs to be accessed, the error identification value is already available, allowing immediate error detection without waiting for full block reading. This preliminary preparation eliminates the time lag associated with block-level error checking.
Data Source
AI summary
A device for reading out a predetermined data word from a memory in which a data block is divided into a plurality of data words including the predetermined data word, an error identification value associated with the respective data word per data word of the plurality of data words, and a correction value associated with the data block are stored, having an error identifier implemented to check whether the predetermined data word comprises a predetermined relation to the associated error identification value to conclude that there is an error if the predetermined relation is not present, and an error corrector implemented to correct, if the predetermined data word does not have the predetermined relation to the associated error identification value, the error using the correction value, wherein the error corrector is implemented to use the correction value independent of which data word of the plurality of data words is the predetermined data word.