Memory Device Word Line Holding for Program Voltage Control

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Solution Overview

Problem

In nonvolatile memory devices, the potential difference between selected and unselected word lines during program and verification operations can lead to errors and unnecessary power consumption, particularly due to the significant voltage differences applied to these lines.

Innovation Solution

A memory device and method that includes a word line holding operation and adjusts the voltage levels applied to unselected word lines based on their state relative to the selected word line, using holding and verification pass voltages to optimize power usage and reduce errors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If a program pulse with high voltage is applied to the selected word line to perform program operation, then the program operation efficiency is improved, but the potential difference between selected and unselected word lines increases causing errors and unnecessary power consumption

Engineering Contradiction:
Improveprogram operation efficiencyVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSLoss of energy

Solution Approach 1:

The patent applies different voltage levels to different groups of unselected word lines based on their physical location relative to the selected word line. Word lines adjacent to the selected word line receive a first voltage level, while non-adjacent word lines receive a second voltage level. This localized differentiation reduces the potential difference between selected and unselected word lines, minimizing errors and power consumption while maintaining program operation efficiency.

Inventive Principle:
Principle #3Local quality

2Reliability

If a program pulse with high voltage is applied to the selected word line, then the program operation is effective, but errors occur in verification operation due to potential difference between word lines

Engineering Contradiction:
Improveprogram operation effectivenessVSAvoidverification operation accuracy
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent implements local quality by applying different voltage levels to adjacent versus non-adjacent unselected word lines. This creates a localized voltage distribution that maintains the necessary potential difference for effective program operation on the selected word line while minimizing the potential difference in regions where verification operations are performed, thereby improving verification accuracy.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent applies a first voltage level to adjacent unselected word lines and a second voltage level to non-adjacent unselected word lines, creating equipotential regions that minimize potential differences. This reduces the likelihood of errors in verification operations by ensuring that word lines in the same region have similar potential levels, preventing interference during verification.

Inventive Principle:
Principle #12Equipotentiality

3Measurement precision

If high voltage is applied to all unselected word lines to prevent errors, then verification accuracy is improved, but power consumption increases

Engineering Contradiction:
Improveverification operation accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSLoss of energy

Solution Approach 1:

The patent applies local quality by differentiating voltage levels based on the physical location of unselected word lines. Only adjacent unselected word lines receive a higher first voltage level to prevent errors, while non-adjacent word lines receive a lower second voltage level. This selective approach maintains verification accuracy where needed while reducing power consumption in regions where high voltage is not necessary.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent implements partial action by applying high voltage only to the extent necessary - specifically to adjacent unselected word lines that are most likely to cause errors. Non-adjacent word lines receive a lower voltage level, avoiding excessive power consumption while still maintaining sufficient verification accuracy through the localized high-voltage application.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12451204B2Memory device supporting word line holding operation and operating method of the same
Publication Date: 2025.10.21 SK HYNIX INC
  • US12451204B2 patent drawing
  • US12451204B2 patent drawing
  • US12451204B2 patent drawing

AI summary

A memory device including: a memory device may include: a memory cell array, and a controller configured to perform program loops each comprising a voltage application operation, a word line holding operation, and a verification operation until a program operation for selected memory cells is successful, during the word line holding operation, apply a holding pass voltage having a higher level than a ground voltage to each of first word lines having a program state and second word lines having an erase state, which belong to unselected word lines among a plurality of word lines, during the verification operation, apply a verification pass voltage having a higher level than the holding pass voltage to K word lines that belong to the first word lines and the second word lines, and apply the holding pass voltage to remaining word lines except the K word lines, among the second word lines.