Semiconductor Memory Word Line Leakage Detection
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Solution Overview
Problem
Conventional functional tests struggle to detect high-impedance word line leakage current in semiconductor memory devices, which can lead to reliability issues over time, and require time-consuming switching between DC tests and functional tests, making it difficult to integrate into mass production.
Innovation Solution
A semiconductor memory device and test method that include a row decoder, a voltage pump circuit, a programmable current comparator, and a control circuit, which allow for the detection of high-impedance word line leakage current within a functional test by applying a test voltage and comparing the resulting test current with a programmable reference current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional functional test is used, then test time is short and mass production is feasible, but high-impedance word line leakage current cannot be detected
Solution Approach 1:
The patent merges the DC test functionality into the functional test by integrating a voltage pump circuit that can generate high voltage only when needed for leakage current detection. The same test path and current comparator are used for both functional testing and leakage current testing, eliminating the need for separate DC test equipment and reducing overall test time while maintaining detection capability.
Solution Approach 2:
The voltage pump circuit is designed to be dynamically activated only during leakage current detection phases. The circuit switches between normal operating voltage mode and high voltage pump mode based on test requirements, allowing the system to maintain low test time for functional testing while enabling high-impedance leakage current detection when needed.
2Measurement precision
If DC test is used to detect high-impedance word line leakage current, then detection capability is improved, but test time increases and mass production integration becomes difficult
Solution Approach 1:
The patent combines DC test functionality with functional test by using the same test path, current comparator, and control circuitry. The voltage pump circuit is integrated into the existing memory device structure, eliminating the need for separate DC test equipment and reducing overall system complexity while maintaining high-impedance leakage current detection capability.
Solution Approach 2:
The test path and current comparator are designed to serve multiple functions: they can perform both functional testing at normal voltages and leakage current detection at high voltages. This multi-functionality reduces the need for dedicated DC test equipment and simplifies the overall test system while maintaining detection capability.
3Productivity
If voltage pump circuit is integrated into functional test, then test time is reduced and mass production is enabled, but device complexity increases
Solution Approach 1:
The voltage pump circuit is extracted as a separate, dedicated module within the memory device that only activates when needed for leakage current detection. This modular approach allows the pump circuit to be integrated into the functional test system without permanently increasing the complexity of the main memory operation circuits, as the pump functionality is isolated and only operational during specific test phases.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution simplifies the testing of high-impedance word line leakage current, significantly reducing test time and enabling the integration of DC tests into standard mass production projects, thereby improving product reliability.
Implementation Method 1
The first voltage pump circuit is configured on the first test path, receives an operating voltage for adjusting, and applies a test voltage to the test word line
Implementation Method 2
The first programmable current comparator is coupled to the first test path, transmits the operating voltage to the first voltage pump circuit according to a received supply voltage, and compares a test current flowing through the first test path with a programmable reference current to provide a test result signal
Data Source
AI summary
A semiconductor memory device and a test method thereof are provided. The semiconductor memory device includes a plurality of word lines, a row decoder, a first voltage pump circuit, a first programmable current comparator and a control circuit. The row decoder decodes a row address data and accordingly selects a test word line to be electrically connected to a first test path. The first voltage pump circuit is configured on the first test path and applies a test voltage to the test word line. The first programmable current comparator compares a test current flowing through the first test path with a programmable reference current to provide a test result signal. The control circuit uses the word lines as the test word line sequentially, compares the corresponding test current with the programmable reference current and determines whether the test word line is defective according to the test result signal.