Semiconductor Memory Word Line Precharge Voltage Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Semiconductor memory devices face the program disturb phenomenon, where data integrity is compromised due to uneven precharge levels across memory cells during programming, leading to inefficiencies and potential data loss.
Innovation Solution
The semiconductor memory device employs a method of grouping word lines into distinct groups based on their proximity to select transistors, applying different pre-bias voltages to each group to ensure uniform precharge levels, thereby mitigating the program disturb phenomenon by adjusting voltages according to the position of the word line within the memory cell array.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If uniform precharge voltage is applied to all word lines, then the programming process is simplified, but program disturb phenomenon occurs due to uneven precharge levels across memory cells
Solution Approach 1:
The patent applies different precharge voltages to different word line groups based on their position in the memory cell array. Word lines closer to the drain select transistor receive higher precharge voltages, while those closer to the source select transistor receive lower precharge voltages. This local differentiation ensures uniform effective precharge levels across all memory cells, preventing program disturb phenomenon while maintaining data integrity.
Solution Approach 2:
The patent changes the voltage parameter of word lines by applying differentiated precharge voltages to different word line groups. This parameter modification compensates for the uneven voltage distribution caused by the inherent resistance in the source line, ensuring that all memory cells experience comparable precharge conditions despite their different positions in the array.
2Reliability
If different pre-bias voltages are applied to word lines based on position, then program disturb is mitigated, but control logic complexity increases
Solution Approach 1:
The patent segments the word lines into multiple groups based on their position relative to the select transistors. Each word line group is assigned a specific precharge voltage level, creating a segmented voltage distribution scheme. This segmentation approach simplifies the control logic by using discrete voltage levels rather than continuous voltage adjustment, making the differentiated precharging manageable through straightforward group-based control.
3Manufacturing precision
If more word line groups are created with different pre-bias voltages, then precharge uniformity improves, but device complexity increases
Solution Approach 1:
The patent creates word line groups with locally optimized precharge voltages based on their position in the memory array. By dividing word lines into groups that receive different precharge levels according to their proximity to the drain and source select transistors, the patent achieves uniform effective precharge across all memory cells while avoiding the need for individual word line control, thus balancing precision with manageable complexity.
Data Source
AI summary
The semiconductor memory device includes a memory cell array, a peripheral circuit and a control logic. The memory cell array includes a plurality of memory cells. The peripheral circuit performs a program operation for the plurality of memory cells in the memory cell array. The control logic controls the peripheral circuit and the memory cell array such that, during the program operation for the plurality of memory cells, pre-bias voltages are applied to a plurality of word lines coupled to the plurality of memory cells to precharge channel regions of the plurality of memory cells. Furthermore, different pre-bias voltages are applied to the plurality of word lines depending on the relative positions of the word lines.