Nonvolatile Memory Word Line Recovery Voltage Management
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Solution Overview
Problem
Nonvolatile memory devices face challenges in reducing read disturbance and improving operational efficiency, particularly in setting up word lines and managing voltages during read operations.
Innovation Solution
The method involves floating word lines with a recovery voltage higher than ground voltage during recovery operations, which reduces read disturbance by preventing the formation of channel-off ranges and allows for faster word line setup times.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If word lines are discharged to ground voltage during recovery operation, then read disturbance is reduced, but word line setup time increases
Solution Approach 1:
The patent applies preliminary action by pre-charging bit lines to a first voltage level before read operations and maintaining word lines at a first voltage level (not ground) during recovery. This preliminary preparation eliminates the need for time-consuming voltage transitions during actual read operations, thereby reducing read disturbance while minimizing setup time penalties
Solution Approach 2:
The patent changes the voltage parameter of word lines during recovery operation, maintaining them at a first voltage level (such as read pass voltage or intermediate voltage) rather than discharging to ground voltage. This parameter change allows faster transition to operational voltages and reduces the formation of channel-off ranges, thereby reducing read disturbance while improving setup speed
2Loss of time
If word lines are maintained at higher voltage during recovery, then word line setup time is reduced, but read disturbance increases
Solution Approach 1:
The patent applies local quality by differentiating voltage levels for different word lines during recovery operation. Selected word lines are maintained at appropriate voltage levels while unselected word lines can be discharged to ground voltage. This localized voltage management reduces read disturbance in unselected regions while maintaining fast setup characteristics in selected regions
Solution Approach 2:
The patent uses preliminary action by pre-charging bit lines to appropriate voltage levels before read operations. This preliminary preparation ensures that when read operations commence, the bit lines are already in the correct state, allowing word lines to be maintained at higher voltages during recovery without causing excessive read disturbance, as the bit line charging compensates for potential interference
Data Source
AI summary
A method is for operating a nonvolatile memory device, the nonvolatile memory device including at least one string connected to a bit line, the at least one string including a plurality of memory cells connected in series, each of the plurality of memory cells being connected to a respective word line among a plurality of word lines and stacked in a direction perpendicular to a substrate. The method includes applying a word line voltage needed for an operation to a first word line among the word lines, applying a recovery voltage higher than a ground voltage to the first word line after the operation, and then floating the first word line.