Non-volatile Memory Word Line Voltage Control
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Solution Overview
Problem
As the size of memory cell arrays in non-volatile memory devices increases, the difference in threshold voltage between near and far memory cells from the address decoder grows, leading to reduced program accuracy and potential over-programming of near memory cells.
Innovation Solution
The implementation of a non-volatile memory device with a first and second word line, where the address decoder applies a higher voltage than the program voltage to the first word line and a lower voltage than the pass voltage to the second word line during the over-program period, and subsequently switches to the program voltage and pass voltage during the normal program period, to reduce the voltage difference between near and far memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If the memory cell array size is increased, then the storage capacity is improved, but the threshold voltage difference between near and far memory cells increases
Solution Approach 1:
The patent applies different voltage levels to different word lines based on their position in the memory array. Specifically, it uses a higher voltage (Vpgm + ΔV) for word lines with memory cells closer to the address decoder and a standard voltage (Vpgm) for word lines with memory cells farther away. This parameter change compensates for the voltage drop and timing differences caused by the large array size, ensuring uniform threshold voltage programming across all memory cells regardless of their position.
2Device complexity
If the program voltage is applied uniformly to all word lines, then the device complexity is reduced, but the program accuracy decreases due to over-programming of near memory cells
Solution Approach 1:
The patent implements local quality by assigning different voltage characteristics to different regions of the memory array. Word lines are divided into at least two groups: those requiring a higher voltage (Vpgm + ΔV) for cells closer to the address decoder, and those requiring the standard program voltage (Vpgm) for cells farther away. This localized voltage adjustment ensures that each region receives the appropriate programming strength, preventing over-programming of near cells while maintaining adequate programming of far cells.
3Reliability
If the program time is extended to ensure far memory cells are programmed, then the program completeness is improved, but the near memory cells become over-programmed
Solution Approach 1:
The patent applies a higher voltage to certain word lines during the programming operation to preemptively compensate for the faster programming speed of near memory cells. By raising the voltage on specific word lines before or during the programming pulse, the system ensures that near cells receive sufficient programming energy in a shorter time, allowing the overall program operation to be completed in time for far cells without causing over-programming of near cells.
Data Source
AI summary
A non-volatile memory device includes a first word line, a second word line, first memory cells, second memory cells, and an address decoder. The second word line is adjacent to the first word line. The first memory cells are connected to the first word line. The second memory cells are connected to the second word line. The second memory cells are connected to the first memory cells, respectively. The address decoder applies a first voltage to the first word line and applies a second voltage to the second word line in an over program period of the first memory cells. The first voltage is higher than a program voltage of the first and second memory cells. The second voltage is lower than a pass voltage of the first and second memory cells.