Semiconductor Memory Word Line Voltage Control for Write Setup Time
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current semiconductor memory devices face inefficiencies in the write operation process, particularly in the program verify operation, due to varying conditions for non-selected word lines across different word line groups, which affect the setup time and processing capacity.
Innovation Solution
The semiconductor memory device employs a control circuit to manage distinct voltage conditions for the program verify operation of different word line groups, optimizing the voltage setup for non-selected word lines to reduce setup time and enhance processing capacity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the voltage of non-selected word lines is raised to a first voltage in the same manner regardless of word line group, then the circuit design is simple, but the setup time cannot be optimized for different word line groups and processing capacity is reduced
Solution Approach 1:
The patent segments the word lines into multiple word line groups (first word line group and second word line group) and applies different voltage raising conditions to each group during the program verify operation. This segmentation allows the controller to optimize setup time for each group independently, thereby improving processing capacity without requiring complete redesign of the voltage control system.
Solution Approach 2:
The patent implements dynamic voltage control by adjusting the voltage raising conditions for non-selected word lines based on which word line group is currently being operated. The controller dynamically selects different voltage strategies (first voltage condition vs. second voltage condition) depending on the operational context, enabling optimization of setup time while maintaining manageable system complexity through conditional logic.
2Loss of time
If the voltage of non-selected word lines is raised quickly, then the setup time is reduced, but current variations increase and may affect operation reliability
Solution Approach 1:
The patent applies different voltage raising strategies to different word line groups based on their specific operational context. For the first word line group, one voltage raising condition is applied, while for the second word line group, a different condition is applied. This localized optimization allows each group to achieve minimal setup time appropriate to its characteristics without causing excessive current variations that would compromise reliability.
Solution Approach 2:
The patent changes the voltage parameter conditions for non-selected word lines based on the selected word line group. By adjusting voltage raising conditions (such as voltage level, raising speed, or timing) according to which group is active, the system optimizes setup time while maintaining current variations within acceptable limits, thus balancing speed and reliability.
Data Source
AI summary
According to embodiments, a semiconductor memory device includes a memory string including a first select transistor, a first memory cell, and a second memory cell, a bit line, a first word line, a second word line, and a control circuit configured to execute a write operation including a program operation and a program verify operation. The control circuit is configured to raise a voltage of the second word line to a first voltage based on a first condition, in a case of executing the program verify operation of the first memory cell, and to raise a voltage of the first word line to the first voltage based on a second condition different from the first condition, in a case of executing the program verify operation of the second memory cell.