3D Memory Word Line Layout for Lower Coupling Capacitance
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Solution Overview
Problem
In 3D stack structures of semiconductor devices, signal interference and increased coupling capacitance occur between adjacent word lines due to alternating directions of driving voltages, which affect the performance and efficiency of memory devices.
Innovation Solution
The memory device is designed with word lines stacked in a vertical direction, where first and second word line pads are connected to separate row decoders, allowing adjacent word lines to be driven in the same direction within each group, reducing signal interference and coupling capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If word lines are driven in alternating directions in a 3D stack structure, then the row decoder can control all word lines, but signal interference and coupling capacitance increase between adjacent word lines
Solution Approach 1:
The word lines are divided into multiple groups (first word line group and second word line group), with each group driven by separate row decoders. This segmentation allows adjacent word lines within the same group to be driven in the same direction, reducing signal interference while maintaining overall control capability.
Solution Approach 2:
Different driving directions are applied to different groups of word lines based on their spatial arrangement. The first row decoder drives word lines in a first direction while the second row decoder drives word lines in a second direction, creating localized optimization that reduces interference in specific regions.
2Adaptability or versatility
If word lines are driven in alternating directions, then comprehensive word line control is achieved, but coupling capacitance between adjacent word lines increases
Solution Approach 1:
By segmenting word lines into groups controlled by separate row decoders, the patent reduces the number of alternating direction transitions between adjacent word lines. This segmentation strategy maintains control flexibility while minimizing the cumulative coupling capacitance that would result from alternating driving directions across all word lines.
3Device complexity
If all word lines are connected to a single row decoder, then device structure is simplified, but signal interference between adjacent word lines increases
Solution Approach 1:
The patent segments the word line control function into multiple row decoders, each responsible for driving specific groups of word lines. This segmentation increases device complexity slightly but significantly reduces signal interference by ensuring adjacent word lines within the same group are driven in the same direction.
Solution Approach 2:
Different row decoders are assigned to drive different spatial groups of word lines with specific driving directions. This local assignment optimizes signal integrity in each region while maintaining an overall manageable device architecture.
Data Source
AI summary
A memory device includes a plurality of word lines stacked in a vertical direction on a semiconductor substrate and including word line pads extending in a first direction, and a row decoder configured to provide a driving voltage to the plurality of word lines, wherein first word line pads provided at first end portions of a plurality of first word lines sequentially stacked among the plurality of word lines are connected to the row decoder, and second word line pads provided at second end portions of a plurality of second word lines sequentially stacked among the plurality of word lines are connected to the row decoder.