Memory Device Read Margin via Adjacent Word-Line Voltages
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Solution Overview
Problem
Non-volatile memory devices, such as 3D NAND flash memory, suffer from program disturbance and word line coupling issues due to etching-induced damages and defects, which reduce reliability and read margin.
Innovation Solution
Implementing specific voltage schemes that apply different pass voltages to adjacent word lines during read and program operations to reduce coupling-induced edge summation loss, including using higher pass voltages for some word lines to counteract electron trapping and lower resistances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional uniform pass voltage is applied to all adjacent word lines during read operations, then the operation is simple, but coupling-induced edge summation loss occurs due to etching-induced damages and defects
Solution Approach 1:
The patent applies different pass voltages to different word lines based on their specific positions and susceptibility to coupling effects. Word lines closer to the damaged region receive higher pass voltages to counteract electron trapping, while other word lines receive lower pass voltages. This localized differentiation resolves the contradiction by improving read margin in critical areas without unnecessarily complicating the overall voltage scheme.
Solution Approach 2:
The patent changes the voltage parameter (pass voltage level) dynamically based on word line position and programming status. By adjusting the pass voltage parameter selectively for different word lines during read operations, the patent compensates for etching-induced damages and reduces coupling effects, thereby improving reliability without requiring fundamental changes to the device structure.
2Reliability
If higher pass voltage is applied to counteract electron trapping in damaged regions, then reliability improves, but energy consumption increases
Solution Approach 1:
The patent applies higher pass voltages only to specific word lines that are closer to the damaged region or have higher susceptibility to coupling effects, while applying lower pass voltages to other word lines. This localized approach improves program disturbance resistance in critical areas without unnecessarily increasing energy consumption across the entire memory array.
Solution Approach 2:
The patent applies excessive (higher) pass voltage only partially to specific word lines that require additional compensation for etching-induced damages, rather than applying high voltage to all word lines. This partial application of excessive voltage achieves the necessary reliability improvement while minimizing overall energy consumption during read operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Improves read margin and reliability by reducing coupling-induced edge summation loss, with minimal impact on typical page programming time and requiring only firmware changes.
Implementation Method 1
suffer from program disturbance and word line coupling issues due to etching-induced damages and defects
Implementation Method 2
applying a first read voltage to a first word line WLn corresponding to target memory cells, applying a first pass voltage to a second word line WLn−1 corresponding to memory cells adjacent to the target memory cells, and applying a second pass voltage to a third word line WLn+1 corresponding to memory cells adjacent to the target memory cells
Data Source
AI summary
A method of operating a memory device includes applying a first read voltage to a first word line WLn corresponding to target memory cells, applying a first pass voltage to a second word line WLn−1 corresponding to memory cells adjacent to the target memory cells, and applying a second pass voltage to a third word line WLn+1 corresponding to memory cells adjacent to the target memory cells. The second pass voltage is higher than the first pass voltage.