3D Nonvolatile Memory Word-Line Rounding to Suppress Leak Currents

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Solution Overview

Problem

Existing nonvolatile semiconductor memory devices face challenges in increasing integration levels and preventing leak currents due to the concentration of electric fields at the ends of word lines, which can lead to inefficiencies in data storage and retrieval operations.

Innovation Solution

The implementation of a nonvolatile semiconductor memory device with rounded ends in the column direction of conductive layers, which reduces the concentration of electric fields and minimizes leak currents by increasing the distance between adjacent word lines and incorporating curvature in the word line conductive layers, thereby enhancing data storage efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If word lines are configured with sharp ends to maximize storage capacity, then integration level increases, but electric field concentration causes increased leak currents

Engineering Contradiction:
Improvestorage capacityVSAvoidleak currents
Core Design Contradiction:
Quantity of substanceVSObject-generated harmful factors

Solution Approach 1:

The word lines are configured with rounded ends instead of sharp ends. This curvature modification reduces electric field concentration at the ends of the word lines, thereby suppressing leak currents while maintaining the necessary storage capacity through optimized three-dimensional stacking of memory cells

Inventive Principle:
Principle #14Spheroidality (Curvature)

2Area of stationary object

If word lines are positioned closer together to increase integration density, then device size decreases, but electric field concentration between adjacent word lines increases

Engineering Contradiction:
Improvedevice areaVSAvoidelectric field concentration
Core Design Contradiction:
Area of stationary objectVSObject-generated harmful factors

Solution Approach 1:

By rounding the ends of word lines, the patent reduces the sharp corners that concentrate electric fields. This allows word lines to be positioned closer together for higher integration density while minimizing unwanted electric field concentration and associated leak currents between adjacent word lines

Inventive Principle:
Principle #14Spheroidality (Curvature)

3Quantity of substance

If three-dimensional stacking is implemented to raise integration level, then storage capacity increases, but manufacturing complexity increases

Engineering Contradiction:
Improvestorage capacityVSAvoidmanufacturing complexity
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The memory device is divided into multiple stacked layers with conductive layers, insulating layers, and memory cells arranged in three dimensions. This segmentation enables increased storage capacity through vertical stacking while managing manufacturing complexity through modular layer construction

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The rounded ends of word lines in the three-dimensional stacked structure reduce electric field concentration, improving device reliability and reducing leak currents, which helps offset the increased manufacturing complexity associated with three-dimensional stacking

Inventive Principle:
Principle #14Spheroidality (Curvature)

Data Source

PatentUS12142486B2Nonvolatile semiconductor memory device and method of manufacturing the same
Publication Date: 2024.11.12 KIOXIA CORP
  • US12142486B2 patent drawing
  • US12142486B2 patent drawing
  • US12142486B2 patent drawing

AI summary

According to an embodiment, a nonvolatile semiconductor memory device comprises a plurality of conductive layers that are stacked in plurality in a first direction via an inter-layer insulating layer, that extend in a second direction which intersects the first direction, and that are disposed in plurality in a third direction which intersects the first direction and the second direction. In addition, the same nonvolatile semiconductor memory device comprises: a semiconductor layer that has the first direction as a longitudinal direction; a tunnel insulating layer that contacts a side surface of the semiconductor layer; a charge accumulation layer that contacts a side surface of the tunnel insulating layer; and a block insulating layer that contacts a side surface of the charge accumulation layer. Furthermore, in the same nonvolatile semiconductor memory device, an end in the third direction of the plurality of conductive layers is rounded.