Memory Circuitry Write Assist Voltage Boost

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Solution Overview

Problem

Existing memory circuitry using write assist voltage boost faces issues such as unintended switching on of column select transistors for unselected columns and increased power consumption due to write signals being driven below ground voltage, leading to potential errors and inefficiencies in write operations.

Innovation Solution

The solution involves boosting column select signals outside the normal operating voltage range, with unselected signals being boosted below ground level to reduce gate-to-source voltage and selected signals being boosted above the normal level to improve write operations without further lowering the write signal, using voltage boosting circuitry like charge pumps within the column select circuitry.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If write signals are driven below ground voltage level to discharge bit lines more rapidly, then write operation speed is improved, but unintended switching on of column select transistors for unselected columns occurs

Engineering Contradiction:
Improvewrite operation speedVSAvoidunintended switching of column select transistors
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent applies different voltage levels to column select signals based on the selection state: unselected columns receive a first voltage level (below ground) to maintain high impedance and block write operations, while the selected column receives a second voltage level (above ground) to enable low impedance and allow write operations. This local differentiation of voltage quality resolves the contradiction by ensuring that only the intended column is affected by the boosted write signal.

Inventive Principle:
Principle #3Local quality

2Speed

If write signals are driven below ground voltage level, then discharge rate of bit lines is improved, but power consumption increases due to leakage through passgate transistors

Engineering Contradiction:
Improvedischarge rate of bit linesVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The patent changes the voltage parameter of column select signals dynamically: unselected columns are held at a first voltage level (below ground) to maintain high impedance state and minimize leakage current, while the selected column is switched to a second voltage level (above ground) to enable low impedance state for rapid discharge. This parameter change approach minimizes power consumption during non-selected states while maintaining high discharge rates when needed.

Inventive Principle:
Principle #35Parameter changes

3Productivity

If column select transistors for unselected columns are held in low impedance state, then write operations can proceed, but leakage through these transistors increases causing errors

Engineering Contradiction:
Improvewrite operation throughputVSAvoiddata integrity
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies differentiated voltage levels to column select signals: unselected columns receive a first voltage level that maintains high impedance to block leakage and preserve data integrity, while the selected column receives a second voltage level that enables low impedance for write operations. This local quality differentiation ensures that productivity is maintained for the selected column while reliability is preserved for unselected columns.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces unintended switching and leakage, enhances write operation efficiency, and minimizes power consumption by maintaining column select transistors in appropriate impedance states, thereby improving data integrity and reducing errors during write operations.

Implementation Method 1

using voltage boosting circuitry like charge pumps within the column select circuitry

Methodology Applied
Scientific EffectCharge pump: Pump

Data Source

PatentUS9741410B2Memory circuitry using write assist voltage boost
Publication Date: 2017.08.22 ARM LTD
  • US9741410B2 patent drawing
  • US9741410B2 patent drawing
  • US9741410B2 patent drawing

AI summary

Within a memory 2 comprising an array 4 of bit cells 6 write driver circuitry 14 uses a boosted write signal which is boosted to a lower than normal level during a write operation. Column select transistors 16 are driven by column select circuitry 12. The column select signal is boosted to a lower than normal level when a column is unselected and to higher than a normal level when a column is selected. Voltage boost circuitry, such as charge pumps 20, 22 are employed within the column select circuitry 12 to achieve these boosted levels for the columns select signal.