Semiconductor Memory Write Circuit Read-Modify-Write Control
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Solution Overview
Problem
Current semiconductor memory devices face challenges in efficiently managing write operations, particularly when multiple write commands are received sequentially, leading to potential data corruption and increased power consumption due to unnecessary writing.
Innovation Solution
The semiconductor memory device employs a Read-Modify-Write method where data is read and compared with write data, and only differing data is written, utilizing a latch circuit to determine when to drive the write driver, ensuring necessary writes are performed while minimizing unnecessary operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If multiple write commands are processed sequentially without comparison, then write speed is improved, but data corruption risk increases and power consumption increases due to unnecessary writes
Solution Approach 1:
The patent applies preliminary action by reading the current data from the memory cell before performing the write operation. This allows the system to compare the existing data with the new write data and determine whether a write is actually necessary, thereby preventing data corruption from redundant writes while maintaining efficient processing
Solution Approach 2:
The patent implements feedback by comparing the read data with the write data and using this comparison result to control whether the write driver is activated. The latch circuit provides feedback control by setting the write enable signal based on the comparison outcome, ensuring writes only occur when necessary and thus maintaining data integrity
2Reliability
If write operations are performed for every write command, then write completeness is improved, but power consumption increases due to unnecessary writes
Solution Approach 1:
The patent applies partial action by performing write operations only when necessary - specifically when the read data differs from the write data. This avoids excessive write operations that would consume unnecessary power, while still ensuring complete writes when needed through the comparison-based control mechanism
Solution Approach 2:
The system performs self-service by automatically comparing its own current state (read data) with the incoming write data and making decisions about whether to proceed with writing. This self-determination mechanism eliminates unnecessary writes and reduces power consumption without external intervention
3Reliability
If data comparison and conditional writing is implemented, then power consumption is reduced and reliability is improved, but device complexity increases
Solution Approach 1:
The patent applies universality by designing the latch circuit to perform multiple functions: it stores the write enable signal, performs comparison logic control, and generates the final write control signal. This multi-functional approach reduces the need for separate dedicated circuits for each function, thereby limiting the increase in device complexity
Data Source
AI summary
According to one embodiment, a semiconductor memory device comprises a first memory cell including a first resistance change element; and a write circuit configured to write data to the first memory cell. The write circuit includes a first circuit including a first input terminal supplied with a first signal based on read data from the first memory cell and a second input terminal supplied with a second signal based on write data to the first memory cell; and a second circuit including a first input terminal supplied with a third signal from an output terminal of the first circuit and a second input terminal supplied with a fourth signal.