Memory Controller Write-Count Rearrangement for Flash Wear Control

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Solution Overview

Problem

Existing data storage devices face challenges in efficiently managing data access while minimizing the consumption of memory blocks and extending their service life.

Innovation Solution

A data processing method that involves maintaining write counts for memory sub-regions and selectively performing data rearrangement on non-hot-write sub-regions to maintain continuous physical addresses, thereby avoiding excessive wear on memory blocks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data rearrangement is performed on all sub-regions to improve data continuity, then read operation efficiency is improved, but memory block service life is excessively consumed

Engineering Contradiction:
Improveread operation efficiencyVSAvoidmemory block service life
Core Design Contradiction:
ProductivityVSDuration of action of stationary object

Solution Approach 1:

The patent applies local quality by differentiating sub-regions into hot-write and non-hot-write categories based on their write counts. Different data rearrangement strategies are then applied to different sub-regions: full rearrangement for non-hot-write sub-regions to improve continuity, and exclusion from rearrangement for hot-write sub-regions to preserve memory life. This localized differentiation resolves the contradiction by tailoring the rearrangement intensity to local usage characteristics.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent segments the logical units into multiple sub-regions and tracks write counts for each sub-region individually. This segmentation allows the system to identify which sub-regions are hot-write and which are not, enabling selective data rearrangement. By segmenting the management granularity from the entire logical unit down to sub-regions, the system can apply different policies to different segments, thus improving overall efficiency while protecting memory durability.

Inventive Principle:
Principle #1Segmentation

2Productivity

If data rearrangement is performed to maintain continuous physical addresses, then data processing efficiency is improved, but wear on memory blocks increases

Engineering Contradiction:
Improvedata processing efficiencyVSAvoidwear on memory blocks
Core Design Contradiction:
ProductivityVSObject-affected harmful factors

Solution Approach 1:

The patent converts the harmful effect of frequent writes (which causes wear) into a useful indicator for decision-making. By tracking write counts, the system identifies hot-write sub-regions that naturally have high write activity, and uses this information to exclude them from data rearrangement operations. This transforms the wear-inducing write activity into a signal that protects memory by preventing unnecessary rearrangement in those specific sub-regions.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

3Stability of the object's composition

If all sub-regions are selected for data rearrangement, then data continuity is improved, but service life consumption increases

Engineering Contradiction:
Improvedata continuityVSAvoidservice life
Core Design Contradiction:
Stability of the object's compositionVSDuration of action of stationary object

Solution Approach 1:

The patent applies partial action by performing data rearrangement only on a subset of sub-regions (non-hot-write sub-regions) rather than all sub-regions. This partial application of the rearrangement operation is sufficient to improve data continuity in the relevant areas while avoiding the excessive action that would occur if all sub-regions were processed, thereby preventing excessive service life consumption.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS12578866B2Data processing method for improving continuity of data corresponding to continuous logical addresses as well as avoiding excessively consuming service life of memory blocks and the associated data storage device
Publication Date: 2026.03.17 SILICON MOTION INC
  • US12578866B2 patent drawing
  • US12578866B2 patent drawing
  • US12578866B2 patent drawing

AI summary

A data storage device includes a memory device and a memory controller. The memory controller maintains a write count for each sub-region of the memory device. When the memory controller has selected one or more sub-regions to perform a data rearrangement procedure, the memory controller further determines whether a selected sub-region is a hot-write sub-region according to the write count corresponding to the selected sub-region. When the memory controller determines that the selected sub-region is not a hot-write sub-region, the memory controller performs the data rearrangement procedure on the selected sub-region to move data corresponding to logical addresses belonging to the selected sub-region to a memory space of the memory device having continuous physical addresses. When the memory controller determines that the selected sub-region is a hot-write sub-region, the memory controller does not perform the data rearrangement procedure on the selected sub-region.