Semiconductor Memory Write Driver Verification Read Timing
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Solution Overview
Problem
Non-volatile semiconductor memory devices require repetitive write and verification read operations, which degrade overall operation speed due to the need to ensure data integrity when power is cut off, leading to inefficiencies in data storage and retrieval.
Innovation Solution
A semiconductor memory apparatus with a write driver and data sensing section that generates a comparison flag signal based on output data and reference voltage, allowing for immediate adjustment of write signal pulses to optimize the write operation timing following verification read operations, thereby reducing overall operation time.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If verification read operations are performed repeatedly to ensure data integrity in non-volatile memory, then data reliability is improved, but operation speed deteriorates
Solution Approach 1:
The patent applies preliminary action by performing a verification read operation immediately after the write operation completes, before the next write operation begins. This early verification allows the system to detect programming failures promptly and retry only when necessary, rather than waiting for subsequent verification cycles. The write driver generates a verification read signal right after the write signal, enabling early detection and reducing the impact on overall programming speed.
Solution Approach 2:
The patent implements feedback through the verification read operation that reads back the programmed data and compares it with the input data. The read driver generates a read signal, the data sensing section detects the stored data, and the comparison logic determines whether the programming was successful. This feedback mechanism allows the system to adjust subsequent write operations based on the verification result, improving both reliability and efficiency by avoiding unnecessary repeated programming when the first attempt succeeds.
2Manufacturing precision
If the pulse duration of write signals is extended to ensure complete data programming, then manufacturing precision is improved, but productivity deteriorates
Solution Approach 1:
The patent applies dynamics by making the write signal pulse duration variable rather than fixed. The write driver adjusts the pulse duration of write signals based on the specific memory cell being programmed and the required programming depth. This dynamic adjustment allows shorter pulses for cells that program quickly, maintaining productivity, while providing extended pulses for cells requiring more time, ensuring programming accuracy. The verification read operation further informs subsequent pulse duration adjustments.
Solution Approach 2:
The patent implements periodic action through the iterative sequence of write operations followed by verification read operations. Rather than using a single long write pulse, the system applies a series of write pulses separated by verification read operations. Each write-read cycle provides periodic feedback, allowing the system to accumulate programming effect over multiple short pulses while verifying progress, thereby achieving both complete programming and high productivity.
Data Source
AI summary
A semiconductor memory apparatus may include a write driver, a data sensing section, and a programming control section. The write driver may write an input data into a memory cell in response to a write signal. The data sensing section may generate a comparison flag signal by comparing an output data outputted from the memory cell with a reference voltage in response to a verification read signal. The programming control section may generate the write signal for an initial write operation and the verification read signal as soon as the comparison flag signal is enabled.