Memory Write Verification Using ECC Mismatch Detection

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Solution Overview

Problem

Current memory technologies face challenges in detecting and preventing corrupted write-operations due to malicious side-channel attacks, which can result in data being written to wrong memory addresses, compromising data integrity and reliability.

Innovation Solution

Implementing a method that involves reading data from a predetermined memory area, manipulating it to introduce errors that cannot be corrected by error correction schemes, and then writing it back, ensuring that incorrect write-operations can be detected by mismatching the data block and error detection/correction value, thus signaling potential attacks.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error detection/correction values are used to protect memory operations, then data integrity is improved, but the system becomes vulnerable to side-channel attacks that corrupt write-operations

Engineering Contradiction:
Improvedata integrityVSAvoidside-channel attack vulnerability
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The system performs a preliminary read of the error detection/correction value from the predetermined memory area before the write operation. This preliminary action establishes a reference state that can be compared against the post-write state to detect whether the write operation was corrupted by a side-channel attack.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system implements a feedback mechanism by reading back the error detection/correction value after the write operation and comparing it with the expected value. This feedback loop enables the system to detect write operation corruptions and trigger appropriate countermeasures such as shutting down the cryptographic operation.

Inventive Principle:
Principle #23Feedback

2Reliability

If the system detects corrupted write-operations by reading and comparing data, then attack detection capability is improved, but additional read operations increase time consumption

Engineering Contradiction:
Improveattack detection capabilityVSAvoidtime for additional read operations
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs only a partial verification by reading and comparing specifically the error detection/correction value rather than verifying the entire data block. This selective verification approach provides sufficient attack detection capability while minimizing the time overhead of additional read operations.

Inventive Principle:
Principle #16Partial or excessive action

3Reliability

If the system implements comprehensive verification of write-operations, then security against attacks is improved, but system complexity increases

Engineering Contradiction:
Improvesecurity against attacksVSAvoidverification system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The system extracts and verifies only the critical error detection/correction value component separate from the main data block. This extraction approach provides comprehensive security verification while keeping the system complexity manageable by focusing verification efforts on the essential integrity-checking elements rather than the entire data structure.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS20100180181A1Apparatus and method for writing data to be stored to a predetermined memory area
Publication Date: 2010.07.15 INFINEON TECHNOLOGIES AG
  • US20100180181A1 patent drawing
  • US20100180181A1 patent drawing
  • US20100180181A1 patent drawing

AI summary

Method and apparatus for writing data to be stored to a predetermined memory area, the method comprising: reading stored data from the predetermined memory area, the stored data comprising a stored data block and an associated stored error detection value, manipulating, after reading the stored data, at least one of the stored data block and the associated stored error detection value in the predetermined memory area, and writing, after manipulating, the data to be stored to the predetermined memory area.