Memory Write Data Shifting for Hard-Error Masking
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Solution Overview
Problem
Memory devices, particularly phase-change memory (PCM), face recurring hard errors where memory cells become stuck in a particular state, leading to incorrect data retrieval, necessitating a method to correct these errors during the writing process to enhance reliability and endurance.
Innovation Solution
The solution involves shifting data patterns to match the stuck state of memory cells with hard errors, using additional data to identify and correct these errors during writing, and storing shift data for subsequent operations, allowing for the reduction of hard errors during write time and subsequent correction during read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is written to memory cells without error correction, then write operations are simple and fast, but hard errors occur repeatedly causing incorrect data retrieval
Solution Approach 1:
The patent applies preliminary action by identifying hard errors in memory cells before writing data and pre-adjusting the data pattern to account for these errors. The system determines which memory cells have hard errors and modifies the data bits that will be written to those cells, ensuring that even if a cell is stuck in a particular state, the correct logical value can still be retrieved after reading.
Solution Approach 2:
The patent implements feedback by using the read data to verify whether the write operation was successful. After writing modified data to memory cells with known hard errors, the system reads the data back and compares it with the original data to confirm correctness. This feedback mechanism allows the system to adapt and correct for hard errors dynamically.
2Reliability
If data patterns are shifted to match stuck states of memory cells, then hard errors are reduced during writing, but additional processing is required to identify and apply shifts
Solution Approach 1:
The system performs preliminary identification of hard errors and determination of required data shifts before the actual write operation. By pre-calculating which data bits need to be shifted based on the known stuck states of memory cells, the system minimizes processing complexity during the write operation itself while ensuring reliable data storage.
Solution Approach 2:
The patent changes the parameter of data bit positions by shifting specific bits to different locations within the data pattern. This parameter transformation allows the data to be written in a way that compensates for the stuck states of memory cells, effectively converting hard errors into correct data retrieval by altering the arrangement of data bits.
3Reliability
If hard errors are corrected during write operations, then data retrieval reliability improves, but write time and processing resources increase
Solution Approach 1:
The system performs error identification and data adjustment in advance, before the write operation begins. By determining which memory cells have hard errors and pre-modifying the data pattern accordingly, the actual write operation can proceed more quickly without requiring time-consuming error correction during or after the write process.
Solution Approach 2:
The patent implements self-service by having the write operation itself incorporate the error correction mechanism. The data is modified during writing to account for known hard errors, so the correction is performed as part of the normal write process rather than as a separate subsequent operation, eliminating additional time overhead.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces hard errors during writing and enables reliable data retrieval by matching data patterns with stuck memory cells, improving the endurance and reliability of memory devices by correcting multiple hard errors simultaneously during the write process.
Implementation Method 1
When a cell of GST material is heated beyond its melting point and cools relatively rapidly, the phase-change material of the cell is in an amorphous state and can have a resistance associated with a first state, such as logic 0. When the cell of GST material is heated and is cooled relatively slowly, the phase-change material of the cell is in a crystalline state and can have a resistance associated with a second state, such as logic 1.
Implementation Method 2
the phase-change material of the cell is in an amorphous state and can have a resistance associated with a first state, such as logic 0. When the cell of GST material is heated and is cooled relatively slowly, the phase-change material of the cell is in a crystalline state and can have a resistance associated with a second state, such as logic 1.
Data Source
AI summary
This disclosure relates to avoiding a hard error in memory during write time by shifting data to be programmed to memory to mask the hard error. In one implementation, a method of programming data to a memory array includes obtaining error data corresponding to a selected memory cell, shifting a data pattern such that a value to be stored by the selected memory cell matches a value associated with a hard error, and programming the shifted data pattern to memory array such that the value programmed to the selected memory cell matches the value associated with the hard error.