Memory Write Mapping for Energy Reduction
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Solution Overview
Problem
Existing memory technologies, such as SRAM and DRAM, require continuous power to retain data, while non-volatile random access memory (NVRAM) needs power only for data writing, leading to inefficiencies in energy usage during the writing process.
Innovation Solution
Implementing data block compression and error correction code (ECC) techniques to reduce the number of memory devices needed for data storage, allowing for parallel writes and even power dissipation, and using a mapping system to optimize memory device usage, thereby minimizing write energy consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data is written to all memory devices in NVRAM, then data storage reliability is improved, but write energy consumption increases
Solution Approach 1:
The patent divides data into multiple data portions and writes them to different subsets of memory devices. Instead of writing all data to all memory devices, each data portion is written to a specific subset, reducing the total number of write operations while maintaining reliability through redundancy and error correction codes.
Solution Approach 2:
The patent changes the parameter of memory device utilization by dynamically selecting which subset of memory devices to write to based on the data portion. This parameter change allows the system to write to fewer devices at any given time, reducing write energy consumption while still achieving reliable storage through the overall distribution and error correction mechanisms.
2Use of energy by moving object
If data is compressed and written to a subset of memory devices, then write energy consumption is reduced, but device complexity increases
Solution Approach 1:
The patent introduces a memory controller as an intermediary that manages the complexity of data compression, error correction code generation, and memory device subset selection. This intermediary handles the complex operations centrally, allowing the memory devices themselves to remain relatively simple while achieving energy-efficient storage.
Solution Approach 2:
The patent performs data compression and error correction code generation as preliminary actions before writing data to memory devices. By preparing the data in advance and determining the appropriate subset of memory devices beforehand, the system reduces the complexity of the actual write operation and enables more efficient energy utilization.
3Ease of manufacture
If traditional writing methods are used in NVRAM, then implementation simplicity is maintained, but write energy consumption increases
Solution Approach 1:
The patent segments data into multiple portions and distributes them across different subsets of memory devices. This segmentation allows the system to write fewer bytes to each individual device, reducing write energy consumption while maintaining a relatively simple implementation through standardized write operations across multiple devices.
Solution Approach 2:
The patent applies partial action by writing data to only a subset of available memory devices rather than all devices. This partial writing approach reduces write energy consumption while still achieving sufficient storage capacity and reliability through the use of error correction codes and the ability to reconstruct data from the written portions.
Data Source
AI summary
Techniques for memory device writes based on mapping are provided. In one aspect, a block of data to be written to a line in a rank of memory may be received. The rank of memory may comprise multiple memory devices. The block of data may be written to a number of memory devices determined by the size of the block of data. A memory device mapping for the line may be retrieved. The mapping may determine the order in which the block of data is written to the memory devices within the rank. The block of data may be written to the memory devices based on the mapping.