Memory Write Segmentation for Page-Aligned Data Transfer
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Memory devices based on the client/server model face limitations in flexibility and efficiency due to standardized communication protocols, which restrict their ability to optimize data transmission and storage operations, leading to reduced performance compared to non-client/server-model systems.
Innovation Solution
A memory device with a controller that determines the size of write-data segments and requests transmission from the host device, allowing for page-sized segments that align with memory page boundaries, enabling efficient data writing even during busy states and avoiding reduced efficiency from partial page writes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the memory device follows standardized communication protocols, then compatibility and ease of operation are improved, but flexibility and performance optimization are worsened
Solution Approach 1:
The memory device dynamically determines the size of write data segments based on its current busy state and page alignment requirements, rather than following fixed standardized segment sizes. This allows the device to adapt its data reception strategy in real-time, improving write efficiency while maintaining protocol compatibility
Solution Approach 2:
The memory device changes the parameter of write data segment size according to its operational state. When the device is busy, it requests smaller segments that align with page boundaries, whereas during idle periods it can accept larger segments. This parameter adaptation resolves the contradiction between standardization and optimization
2Productivity
If the memory device requests data segments aligned with page boundaries, then write efficiency is improved, but communication complexity increases
Solution Approach 1:
The memory device performs preliminary calculations to determine optimal segment sizes that align with page boundaries before requesting data transmission. By pre-determining these parameters based on the current write address and page size, the device simplifies the communication protocol while ensuring efficient page-aligned writing
Solution Approach 2:
The memory device segments the write data into multiple smaller segments that each align with page boundaries. This segmentation allows the device to maintain simple communication protocols while achieving efficient writing, as each segment can be independently processed and stored without requiring complex cross-segment operations
3Loss of time
If the memory device accepts larger write data segments, then transmission time is reduced, but the ability to handle busy states and maintain data integrity is worsened
Solution Approach 1:
The memory device dynamically adjusts the size of write data segments based on its current operational state. When idle, it accepts larger segments to reduce transmission time. When busy, it switches to smaller segments that align with page boundaries, ensuring data integrity can be maintained through proper error correction coding and buffering operations
4Device complexity
If the memory device uses fixed segment sizes for write data, then device complexity is reduced, but write efficiency during busy states is worsened
Solution Approach 1:
The memory device transitions from fixed segment sizes to dynamic segment size determination based on the busy state. The controller calculates optimal segment sizes that align with page boundaries and consider the current write progress, enabling efficient writing during busy states while maintaining relatively simple control logic through automated calculations
Data Source
AI summary
According to the embodiments, a memory device includes a memory to which data is written using memory cells as a write unit and a controller which controls the memory. In response to a request to write data with a logical address to the memory from a host device, the controller requests the host device to transmit a segment of the write data with a size specified by the controller. The controller writes the write data with additional data to the memory. The write-data segment has a size determined to allow the combined size of the write-data segment and corresponding additional data to be the largest while smaller than the size of the write unit or has a multiple integral of the size.