Memory Write Path Switching for Faster ECC Data Masking
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Solution Overview
Problem
Conventional memory devices experience increased response time due to the need for a pre-reading time for data masking, which is unnecessary for normal write commands and inefficiently handled by existing error correction circuits.
Innovation Solution
A memory device and system that include a write command determination unit to differentiate between normal write commands and Read Modify Write (RMW) commands, allowing for the elimination of pre-reading time for normal write operations and optimizing the execution of RMW commands by combining read and write data and generating parity using an ECC engine.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If data masking function is implemented in conventional memory devices, then error correction capability is improved, but response time for write commands increases due to unnecessary pre-reading time
Solution Approach 1:
The system dynamically adjusts the write operation mode based on the command type. For normal write commands, it skips the pre-reading step and directly writes data. For RMW commands, it performs pre-reading before writing. This dynamic adaptation resolves the contradiction by making the pre-reading time conditional rather than fixed.
Solution Approach 2:
The patent applies different processing qualities to different command types. Normal write commands receive a simplified processing path without pre-reading, while RMW commands receive the full processing path including pre-reading. This local differentiation allows error correction functionality to be preserved where needed while eliminating unnecessary time loss where not needed.
2Manufacturing precision
If pre-reading time is applied to all write commands for data masking, then data masking accuracy is improved, but overall write operation speed deteriorates
Solution Approach 1:
The system applies the pre-reading action partially - only when the command type requires it (RMW commands). For normal write commands, the pre-reading action is completely omitted. This partial application of the action maintains data masking accuracy where needed while preserving write operation speed where the full action is not necessary.
Solution Approach 2:
The processing path is made dynamic based on command type detection. The system transitions between two states: a fast path for normal writes that skips pre-reading, and an accurate path for RMW commands that includes pre-reading. This dynamic switching resolves the contradiction between accuracy and speed.
3Reliability
If error correction circuit with data masking function is implemented on chip, then error correction capability is improved, but time loss occurs due to conventional pre-reading requirements
Solution Approach 1:
The patent determines the command type in advance using the write command determination unit, which detects whether the incoming write command is a normal write or an RMW command based on signal levels on command pins. This preliminary detection allows the system to prepare the appropriate processing path before actual data processing begins, eliminating unnecessary pre-reading time for normal writes while maintaining error correction for RMW commands.
Solution Approach 2:
The write operation is segmented into two distinct paths based on command type. The first path handles normal write commands with direct writing and ECC generation. The second path handles RMW commands with pre-reading, data combination, and ECC generation. This segmentation allows each path to be optimized independently, resolving the time loss issue without compromising error correction capability.
Data Source
AI summary
A memory device, a memory system, and a method of operating the same. The memory device includes a memory cell array including a plurality of memory cells and a write command determination unit (WCDU) that determines whether a write command input to the memory device is (to be) accompanied a masking signal. The WCDU produces a first control signal if the input write command is (to be) accompanied by a masking signal. A data masking unit combines a portion of read data read from the memory cell array with a corresponding portion of input write data corresponding to the write command and generates modulation data in response to the first control signal. An error correction code (ECC) engine generates parity of the modulation data.