Memory Write Verification Using a Special Symbol for Failed Writes
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Solution Overview
Problem
Write-and-verify techniques in memory technologies like flash memory and phase change memory consume additional resources and reduce write bandwidth due to the iterative process required for accurate multi-bit storage, making it inefficient.
Innovation Solution
Implementing an iterative write process that includes writing and reading symbols to memory locations, where a special symbol is used to indicate unsuccessful writes, allowing for error correction and efficient storage by limiting retries and using low complexity encoding and decoding methods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If write-and-verify techniques are used to store data with increased accuracy, then manufacturing precision is improved, but productivity deteriorates due to reduced write bandwidth
Solution Approach 1:
The patent applies preliminary action by pre-calculating syndromes and determining error locations before the actual write operation completes. The controller performs syndrome calculations and error analysis in advance, so that when the iterative write process encounters failures, the correction can be applied immediately without additional verification iterations, thus maintaining high accuracy while improving write bandwidth
Solution Approach 2:
The patent introduces an intermediary mechanism in the form of syndrome calculations and error location analysis that acts as a mediator between the write operation and verification process. This intermediary layer pre-processes the data to identify potential errors and their locations, enabling targeted corrections that reduce the number of iterative write-verify cycles needed, thereby resolving the contradiction between accuracy and productivity
2Reliability
If iterative write processes are used to ensure accurate multi-bit storage, then reliability is improved, but loss of time increases due to multiple read/write attempts
Solution Approach 1:
The patent performs preliminary syndrome calculation and error location analysis before the iterative write process completes. By pre-determining which bits are in error and their locations, the system can apply corrections in advance, reducing the number of repeated read/write attempts needed and thereby decreasing the time loss while maintaining reliability
Solution Approach 2:
The patent applies the skipping principle by rushing through the error correction process using pre-calculated syndromes and error locations. Instead of slowly iterating through multiple read-verify-write cycles, the system quickly identifies errors and applies corrections in a single pass, significantly reducing the time loss associated with iterative processes while preserving data reliability
Data Source
AI summary
A method for writing in a memory system that includes receiving an address corresponding to a memory location in a memory, receiving a desired content to be written, encoding the desired content into a symbol, and writing the symbol to the memory location using an iterative write process of at least one write and one read to the memory location. The iterative write process includes determining if the symbol was successfully written to the memory location and exiting the iterative write process in response to the symbol being successfully written to the memory location. The iterative write process also includes determining if a halt condition has been met and exiting the iterative write process if the halt condition has been met. Once the iterative write process has been exited, the memory location may be identified as a candidate for being written with a special symbol.


