Memory Write Speed Control for Changelog Flush Latency

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Solution Overview

Problem

Memory systems experience significant latency and performance degradation when handling large quantities of random write requests due to the suspension of service to flush changelogs, which can limit the ability to service high-priority requests and cause errors.

Innovation Solution

The memory system adjusts write processing speed based on the quantity of regions associated with L2P mappings stored in the active changelog, slowing the speed when the threshold is reached to allow for additional time to flush mappings from the background changelog, thereby reducing suspension frequency and latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the memory system processes write requests at high speed, then productivity is improved, but latency increases when changelog suspension is required

Engineering Contradiction:

Improvewrite request processing throughputVSAvoidlatency during changelog flush suspension

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The memory system dynamically adjusts write processing speed based on the current state of the changelog. When the changelog reaches a threshold quantity of regions, the system slows down write processing to allow background flush operations to complete without suspending service. This dynamic speed adjustment resolves the contradiction by adapting the processing rate to system conditions, maintaining high throughput when possible while preventing latency spikes during flush operations.

Inventive Principle:

Principle #15Dynamics

Solution Approach 2:

The system performs background flush operations of the background changelog concurrently with write request processing. By initiating flush operations in advance and in the background, the system avoids the need to suspend service for flush operations, thereby maintaining high productivity while managing the time loss associated with changelog synchronization.

Inventive Principle:

Principle #10Preliminary action

2Reliability

If the memory system suspends service to flush changelogs, then data consistency is improved, but productivity deteriorates

Engineering Contradiction:

Improvedata consistency during changelog flushVSAvoidwrite request processing throughput

Core Design Contradiction:

ReliabilityVSProductivity

Solution Approach 1:

The system performs changelog flush operations in the background before they are needed, allowing data consistency to be maintained without interrupting write request processing. The background flush operation completes preliminary synchronization tasks, ensuring data consistency while the foreground write requests continue uninterrupted, thus resolving the contradiction between reliability and productivity.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The memory system maintains continuous write request processing by performing flush operations in the background rather than suspending service. The useful action of flush operations continues concurrently with write processing, ensuring data consistency is maintained without stopping productivity. This continuous operation resolves the contradiction by eliminating the trade-off between consistency and throughput.

Inventive Principle:

Principle #20Continuity of useful action

3Productivity

If the memory system increases the threshold quantity of regions in the changelog, then productivity is improved, but the complexity of managing changelog states increases

Engineering Contradiction:

Improvewrite request processing throughputVSAvoidchangelog state management complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

The system uses feedback from monitoring the quantity of regions in the changelog to dynamically adjust write processing speed. When the threshold is approached, the system receives feedback and slows down processing to allow background flush operations to complete. This feedback mechanism allows the system to manage higher threshold quantities without proportionally increasing complexity, as the feedback loop automatically handles the state management.

Inventive Principle:

Principle #23Feedback

Solution Approach 2:

The memory system automatically manages its own changelog state by monitoring the quantity of regions and self-regulating write processing speed accordingly. The system serves itself by detecting when the threshold is reached and autonomously adjusting processing parameters, eliminating the need for external control mechanisms and reducing the complexity burden despite higher threshold quantities.

Inventive Principle:

Principle #25Self-service

Data Source

PatentUS20260003509A1Configurable write processing speeds at a memory system

Publication Date: 2026.01.01 MICRON TECHNOLOGY INC

AI summary

Methods, systems, and devices for configurable write processing speeds at a memory system are described. The described techniques provide for a memory system to slow a write processing speed when the memory system identifies that entries within an active foreground changelog (AL) correspond to a threshold quantity of memory regions. Slowing the write processing speed may allow for additional time for the memory system flush logical-to-physical (L2P) mappings from a background changelog (BL) while still receiving write commands and populating the AL with new L2P mappings. For example, slowing the write processing speed may increase a duration associated with new L2P mappings within the AL satisfying the threshold quantity of memory regions and may enable the memory system to increase the threshold quantity of memory regions without incurring additional latency when flushing L2P mappings to the memory arrays.