Memory Write Training Using Asynchronous Result Feedback

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Solution Overview

Problem

Existing memory devices require read training before write training, leading to signal distortion due to additional circuits, which necessitate a read operation to check data accuracy, complicating the write training process.

Innovation Solution

A semiconductor device performs write training without read training by using an input/output interface with data input/output pins and a write clock signal pin to feed back result values asynchronously, eliminating the need for read training.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If read training is performed before write training to check data accuracy, then write training can be performed, but the training process becomes complex and time-consuming

Engineering Contradiction:
Improvedata accuracyVSAvoidtraining process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the read operation from the write training process by using a separate read buffer that stores write training data independently. This allows write training to proceed without requiring a read operation to verify data accuracy, eliminating the need for read training while maintaining reliable data writing through the buffer mechanism.

Inventive Principle:
Principle #2Taking out (Extraction)

2Manufacturing precision

If additional circuits (matching delay units and buffers) are added to compensate for write clock tree delay, then data timing can be corrected, but signal distortion occurs

Engineering Contradiction:
Improvedata timing precisionVSAvoidsignal distortion
Core Design Contradiction:
Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The patent uses a read buffer to create a copy of the write training data that is stored independently without requiring additional matching delay units or buffers in the write path. This copying mechanism allows the original write path to remain simple and free from signal distortion while still enabling precise timing control through the buffer's read operation.

Inventive Principle:
Principle #26Copying

3Reliability

If read operation is required to check write data accuracy, then data reliability can be ensured, but the training time increases

Engineering Contradiction:
Improvedata accuracy verificationVSAvoidtraining time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary action by storing write training data in a read buffer during the write training process. This preliminary storage allows the system to verify data accuracy without requiring a separate read operation after writing, as the data is already prepared and stored in the buffer, thereby reducing training time while maintaining reliability.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS20260038550A1Semiconductor devices capable of performing write training without read training, and memory system including the same
Publication Date: 2026.02.05 SAMSUNG ELECTRONICS CO LTD
  • US20260038550A1 patent drawing
  • US20260038550A1 patent drawing
  • US20260038550A1 patent drawing

AI summary

A semiconductor device includes an input/output interface with a first data input/output pin, a plurality of second data input/output pins, and a write clock signal pin, which is configured to receive a write clock signal from a memory controller. The first data input/output pin is configured to receive write training data from the memory controller during a write training operation, and the plurality of second data input/output pins feed result values of the write training to the memory controller. This write training is performed by the semiconductor device using the write clock signal and the write training data.