Memory Write Trim Selection for Endurance and TBW Gains
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Solution Overview
Problem
Conventional memory devices fail to balance performance and endurance characteristics during programming operations due to the use of a single set of trim values, which prioritizes performance over endurance, leading to reduced total bytes written (TBW) and increased wear on memory cells.
Innovation Solution
Implementing multiple sets of trim values tailored for different types of programming operations, where performance-type commands use aggressive trim values for faster write times and endurance-type commands use less aggressive trim values to reduce stress on memory cells, thereby enhancing endurance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If a single set of trim values is used for all programming operations, then device complexity is reduced, but endurance deteriorates due to aggressive programming pulses causing increased wear on memory cells
Solution Approach 1:
The patent segments programming operations into different types (performance-type and endurance-type) and assigns different trim value sets to each type. This segmentation allows the system to use aggressive trim values for performance operations while using less aggressive trim values for endurance operations, thereby resolving the contradiction between device complexity and endurance.
Solution Approach 2:
The patent implements dynamic selection of trim value sets based on the type of programming operation. The system can switch between different trim value configurations depending on whether the operation prioritizes performance or endurance, making the trim value configuration adaptive rather than static.
2Speed
If aggressive trim values are used for all programming operations, then write speed is improved, but endurance deteriorates due to increased stress on memory cells
Solution Approach 1:
The patent applies different trim value characteristics to different operation types. Performance-type operations use aggressive trim values (higher speed, more stress) while endurance-type operations use less aggressive trim values (lower speed, less stress). This local differentiation of quality parameters resolves the contradiction between write speed and endurance.
3Reliability
If less aggressive programming pulses are used, then endurance is improved by reducing wear on memory cells, but write speed deteriorates
Solution Approach 1:
The system dynamically adjusts programming pulse characteristics based on operation type. For endurance-type operations, less aggressive pulses are used to reduce wear and improve endurance. For performance-type operations, aggressive pulses are used to maximize write speed. This dynamic adaptation allows the system to optimize for either endurance or speed depending on the operational context.
Data Source
AI summary
Technologies directed to trim values for different types of write commands is described. A controller may receive a write command to be performed on a set of memory cells of a memory device. The write command may be of a first type or a second type. The controller may select a set of trim values based on the write command being of the first type or the second type. The write command may be executed with the selected set of trim values.