Memory Write Validation via Address Signature Comparison

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Solution Overview

Problem

Current data validation techniques, such as CRC, parity check, and ECC validation, do not ensure that data is written to the correct address in memory, leading to potential data corruption and errors during data transfers and storage.

Innovation Solution

A write validation system that generates and compares address signatures to verify that data is written to the correct location, using a first address signature collector module, a second address signature collector module, and an address signature validation module to detect mismatches and generate error or confirmation signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional data validation techniques (CRC, parity check, ECC) are used, then data integrity during transfer is improved, but the ability to verify correct memory address writing is insufficient

Engineering Contradiction:
Improvedata integrityVSAvoidaddress verification accuracy
Core Design Contradiction:
ReliabilityVSMeasurement precision

Solution Approach 1:

The patent introduces address signatures as an intermediary mechanism to verify memory write operations. The address signature collector generates a signature from the actual write address, which is then compared against the expected address signature. This intermediary verification layer enables precise address validation without interfering with the existing data validation techniques (CRC, parity, ECC), thereby resolving the contradiction between maintaining data integrity and achieving accurate address verification.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent creates a copy of the address information in the form of an address signature. Instead of directly verifying the entire address, the system generates a condensed signature representation of the address and compares this copy against the expected signature. This copying approach enables efficient and precise address verification while maintaining the reliability of existing data validation methods.

Inventive Principle:
Principle #26Copying

2Measurement precision

If address signature validation is added to verify correct memory writing, then address verification accuracy is improved, but system complexity increases

Engineering Contradiction:
Improveaddress verification accuracyVSAvoidvalidation system complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts only the essential address information needed for verification by generating address signatures. Instead of implementing a complex full-address comparison system, the invention extracts key address components into compact signature representations. This extraction approach achieves high address verification accuracy while minimizing the added system complexity, as the signature generation and comparison logic is significantly simpler than full address validation.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If comprehensive data validation is implemented, then data corruption detection is improved, but detection time increases

Engineering Contradiction:
Improvedata corruption detectionVSAvoidvalidation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent performs preliminary generation of address signatures during the data write operation itself. By collecting address signature information in advance and preparing it for comparison, the system enables rapid validation without adding significant detection time. The address signature is generated as part of the normal write流程, and the comparison with the expected signature provides immediate feedback on address correctness, thereby maintaining both comprehensive validation and efficient timing.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS7865784B1Write validation
Publication Date: 2011.01.04 MARVELL ASIA PTE LTD
  • US7865784B1 patent drawing
  • US7865784B1 patent drawing
  • US7865784B1 patent drawing

AI summary

A write validation system that includes a first address signature collector module that generates a first address signature that is indicative of a write address of data when the data is received at a memory control module. A second address signature collector module generates a second address signature that is indicative of the write address of the data when the data is transferred from the memory control module. An address signature validation module receives the first address signature from the first address signature collector module, receives the second address signature from the second address signature collector module, and compares the first address signature to the second address signature.