Memory Write Circuit With Auxiliary Signal Voltage Compensation

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

In semiconductor memory devices, the increased parasitic resistances in transmission wires lead to voltage drops between near-end and far-end circuit cells, causing unreliable programming operations due to longer settling times of bit lines, especially when a single voltage regulator serves multiple circuit cells.

Innovation Solution

An auxiliary signal generator is introduced to compensate for voltage drops by generating auxiliary signals that assist in programming operations, ensuring that bit lines are charged to the programming voltage with higher current, thereby reducing settling times and maintaining consistent voltage levels across all circuit cells.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If a single voltage regulator serves multiple circuit cells, then device complexity is reduced, but voltage drops occur due to parasitic resistances in transmission wires

Engineering Contradiction:
Improvevoltage regulator configurationVSAvoidprogramming operation reliability
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

An auxiliary signal generator is introduced as an intermediary component to compensate for voltage drops in far-end circuit cells. The generator receives a reference signal and produces an auxiliary signal that is added to the write voltage, ensuring that far-end cells receive sufficient voltage for reliable programming operations despite parasitic resistance in transmission wires.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies different voltage compensation strategies to different locations in the memory device. Near-end circuit cells receive only the write voltage from the voltage regulator, while far-end circuit cells receive both the write voltage and an auxiliary compensation signal. This localized approach addresses voltage drops only where they occur, maintaining overall system reliability without unnecessary complexity elsewhere.

Inventive Principle:
Principle #3Local quality

2Ease of manufacture

If transmission wires are used to connect voltage regulator to circuit cells, then device layout is simplified, but parasitic resistances cause voltage drops

Engineering Contradiction:
Improvecircuit layoutVSAvoidvoltage level consistency
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The auxiliary signal generator acts as a mediator that compensates for the harmful effects of parasitic resistances in transmission wires. By injecting an auxiliary signal proportional to the expected voltage drop, the system maintains consistent voltage levels at all circuit cells without requiring complex wire routing or low-parasitic designs.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Productivity

If write voltage is applied to far-end circuit cells, then programming operations are enabled, but settling times increase due to voltage drops

Engineering Contradiction:
Improveprogramming operation speedVSAvoidbit line settling time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The auxiliary signal generator performs preliminary compensation by pre-adjusting the voltage level before it reaches far-end circuit cells. The generator produces an auxiliary signal that anticipates and counteracts the voltage drop that would occur during normal operation, allowing bit lines to reach their target voltage faster and reducing settling times.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS11189325B2Device and method for data-writing
Publication Date: 2021.11.30 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11189325B2 patent drawing
  • US11189325B2 patent drawing
  • US11189325B2 patent drawing

AI summary

A device includes several first switching units and several second switching units. Each of the first switching units transmits in response to a first select signal, an auxiliary signal. Each of the second switching units is coupled to a corresponding one of the first switching units and transmits in response to a second select signal, a write voltage to a corresponding one of multiple circuit cells. The second switching units are coupled with each other in a node which receives the write voltage.