Semiconductor Memory Write Circuit With Voltage Control

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Solution Overview

Problem

Current semiconductor memory devices face challenges in achieving improved write operational performance, particularly in controlling resistance states and preventing leakage currents during write operations, which affects their efficiency and reliability.

Innovation Solution

The implementation of a semiconductor memory device with a write circuit, selection circuits, and a voltage control circuit that operate in different voltage domains, using a variable resistance element and a selection element to control currents and voltage levels, preventing leakage and enhancing write performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a conventional write circuit is used to control resistance states, then write operations can be performed, but leakage currents occur during write operations reducing reliability

Engineering Contradiction:
Improvewrite operation reliabilityVSAvoidleakage current
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The write circuit is divided into two independent circuits: a first write circuit for controlling the resistance state of the memory cell and a second write circuit for controlling the selection element. This segmentation allows each circuit to be optimized for its specific function, with the second circuit dedicated to preventing leakage currents by properly controlling the selection element state during write operations.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The selection element acts as an intermediary component between the first write circuit and the memory cell. By introducing this intermediate control element and dedicating a separate write circuit to control it, the patent prevents direct leakage paths while maintaining the ability to perform write operations through the controlled resistance state change.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If voltage levels are not controlled during write operations, then write speed is maintained, but resistance state control precision deteriorates

Engineering Contradiction:
Improveresistance state control precisionVSAvoidwrite operation speed
Core Design Contradiction:
Manufacturing precisionVSSpeed

Solution Approach 1:

The patent dynamically changes voltage parameters during the write operation. The voltage control circuit adjusts voltage levels on the second line based on the operation phase: during the write operation, specific voltage levels are applied to enable precise resistance state control, while during read operations, different voltage levels maintain fast read access. This parameter switching resolves the contradiction between precision and speed.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If a single voltage domain is used for all circuits, then device complexity is reduced, but write operational performance deteriorates

Engineering Contradiction:
Improvewrite operational performanceVSAvoidvoltage domain configuration
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Different voltage domains are assigned to different functional blocks based on their specific requirements. The first write circuit and first line operate in a first voltage domain optimized for resistance state control, while the second write circuit and second line operate in a second voltage domain optimized for selection element control. This local optimization of voltage characteristics improves overall write performance despite increased complexity.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS10395735B2Electronic device and method including memory with first and second write currents
Publication Date: 2019.08.27 SK HYNIX INC
  • US10395735B2 patent drawing
  • US10395735B2 patent drawing
  • US10395735B2 patent drawing

AI summary

An electronic device including a semiconductor memory may be provided. The semiconductor memory may include a write circuit configured for generating a first current. The semiconductor memory may include a first selection circuit configured for coupling the first write circuit to a first line based on a first selection signal. The semiconductor memory may include a second write circuit configured for generating a second current. The semiconductor memory may include a second selection circuit configured for coupling the second write circuit to a second line based on a second selection signal. The semiconductor memory may include a memory cell coupled between the first line and the second line. The semiconductor memory may include a voltage control circuit configured for controlling a voltage level of the second line.