Semiconductor Memory Write Voltage Control for Interference Reduction
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Solution Overview
Problem
Current semiconductor memory devices face challenges in ensuring the reliability of write operations due to interference effects from neighboring word lines, which can lead to expanded threshold voltage distributions and decreased channel potential, affecting data storage accuracy.
Innovation Solution
The semiconductor memory device employs a configuration where specific voltages are applied to word lines during write operations, with a driver circuit managing voltages to prevent interference by applying a write voltage to the target word line and adjusting voltages on adjacent lines, such as using a voltage VPASS3 lower than 10V for word lines WLn+1 and WLn+2, and VPASS4 lower than 10V for WLn-1, to maintain optimal channel potential and prevent threshold voltage distribution expansion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If high voltage is applied to the target word line during write operations, then write speed and effectiveness are improved, but interference effects from neighboring word lines increase causing threshold voltage distribution expansion
Solution Approach 1:
The patent applies different voltage levels to different word lines based on their position relative to the target word line. The target word line receives a first voltage level for effective writing, while neighboring word lines receive a second, lower voltage level to minimize interference. This localized voltage differentiation resolves the contradiction by allowing high voltage where needed while preventing harmful effects in adjacent areas.
2Stability of the object's composition
If voltage is applied to adjacent word lines to prevent interference, then threshold voltage distribution stability is improved, but channel potential decreases affecting write effectiveness
Solution Approach 1:
The patent carefully controls the voltage parameter applied to neighboring word lines, using a second voltage level that is lower than the first voltage level but still sufficient to maintain threshold voltage stability without causing excessive channel potential loss. This parameter optimization resolves the contradiction by finding the appropriate voltage level that balances stability and reliability.
3Reliability
If multiple voltage levels are applied to different word lines to reduce interference, then write operation reliability is improved, but device complexity increases
Solution Approach 1:
The patent segments the word line array into different groups based on their distance from the target word line. The target word line forms one group receiving the first voltage level, while neighboring word lines form another group receiving the second voltage level. This segmentation approach resolves the contradiction by organizing voltage control into manageable groups, reducing overall system complexity while maintaining reliability.
Data Source
AI summary
A memory device includes a first cell above a substrate, a first line connected to the first cell, a second cell above the first cell connected with the first cell, a second line connected to the second cell, a third cell above the second cell connected with the second cell, a third line connected to the third cell, a fourth cell above the third cell connected with the third cell, a fourth line connected to the fourth cell, and a driver applying voltages to the lines when data is written to a cell in a write operation. To write data to the second cell, the driver applies a write voltage to the second line, applies a first voltage lower than the write voltage to the first line, and applies a second voltage higher than the first voltage and lower than the write voltage to the third and fourth lines.