Memory Zone Configuration Across Multiple Planes
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing memory systems are limited in performance and power efficiency as they cannot independently erase some memory cells within a block while maintaining data in others, forcing physical blocks to be the smallest unit of configuration, which restricts zone operations.
Innovation Solution
The ability to independently configure each erase block, which is smaller than a physical block, as part of zones, allowing for simultaneous access to multiple planes and improving performance and power efficiency by enabling zones to be built across multiple planes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If physical blocks are used as the smallest unit of configuration, then data in some memory cells within a block can be preserved during erase operations, but zone operations are restricted and cannot access multiple planes simultaneously
Solution Approach 1:
The patent segments a physical block into multiple independent erase blocks (e.g., EB0-EB3), allowing selective erasure of individual erase blocks while preserving data in others. This segmentation enables zone operations to access multiple planes simultaneously by configuring zones across multiple erase blocks, thereby resolving the contradiction between data preservation and operational flexibility.
Solution Approach 2:
The patent introduces a new dimension of organization by allowing zones to span multiple planes through multiple erase blocks. Instead of being confined to a single physical block, zones can be distributed across multiple planes (e.g., Zone A on Plane 0, Zone B on Plane 1), enabling simultaneous multi-plane access and improving zone operation versatility without compromising data preservation capabilities.
2Reliability
If physical blocks are used as the smallest unit of configuration, then erase operations can be performed on complete blocks, but performance and power efficiency are limited due to inability to access multiple planes simultaneously
Solution Approach 1:
By dividing physical blocks into smaller erase blocks that can be independently erased, the system enables selective erasure operations on specific erase blocks while maintaining complete block erase capability when needed. This segmentation allows zone operations to utilize multiple planes simultaneously, thereby improving memory operation performance and power efficiency without sacrificing reliable complete block erasure.
Solution Approach 2:
The patent merges multiple erase blocks from different planes into zone structures (e.g., Zone A combining EB0 from Plane 0 and EB2 from Plane 1), enabling simultaneous access to multiple planes during zone operations. This merging approach maintains the reliability of complete block erase operations while significantly improving productivity through parallel multi-plane access.
3Device complexity
If zones are confined to single physical blocks, then configuration is simple, but power efficiency is reduced due to inability to perform parallel operations across multiple planes
Solution Approach 1:
The patent segments zones into smaller units that can be distributed across multiple planes through multiple erase blocks. This segmentation allows the memory system to perform parallel operations on different planes simultaneously, improving power efficiency by reducing the need for sequential operations while maintaining relatively simple zone configuration through the use of standard erase block structures.
Data Source
AI summary
An apparatus can comprise a memory array comprising a plurality of strings of memory cells. Each string of the plurality of strings comprises: a first group of memory cells coupled to a first group of access lines and corresponding to a first erase block; and a second group of memory cells coupled to a second group of access lines and corresponding to a second erase block. The first erase block can be configured as a first zone of one or more zones corresponding to a namespace independently of the second erase block.