Memory Device Identification for Shared ZQ Calibration Resistance

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Solution Overview

Problem

As operational speeds of electronic devices increase, impedance mismatches between semiconductor devices and transmission networks lead to signal distortion and errors due to external noise, which are exacerbated by decreasing signal swing widths, making it difficult to maintain optimal data transmission.

Innovation Solution

Incorporating programmable termination components with adjustable impedance in memory devices that can be calibrated using external resistances, and implementing a ZQ ID mode to identify and manage shared external resistances among memory devices, ensuring proper impedance matching and arbitration during calibration operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If operational speeds of electronic devices are increased, then data transmission speed is improved, but signal distortion and transmission errors increase due to impedance mismatches and external noise

Engineering Contradiction:
Improvedata transmission speedVSAvoiddata transmission accuracy
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent implements dynamically adjustable termination components that can change their impedance values in real-time to match varying transmission line characteristics. The termination resistance is made programmable, allowing the system to adapt impedance settings based on operating conditions, thereby maintaining reliable data transmission at high speeds while resolving the contradiction between speed and reliability.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the impedance parameter of termination components through programmable control. By adjusting the termination resistance value dynamically, the system optimizes impedance matching under different operating conditions (temperature, process variations, frequency), thus maintaining signal integrity and reducing errors while supporting high-speed operation.

Inventive Principle:
Principle #35Parameter changes

2Speed

If signal swing width is decreased to accommodate higher operational speeds, then data transmission speed is improved, but the negative effect of external noise increases

Engineering Contradiction:
Improveoperational speedVSAvoidexternal noise susceptibility
Core Design Contradiction:
SpeedVSObject-affected harmful factors

Solution Approach 1:

The termination components are designed with dynamic adjustability, allowing the system to optimize impedance matching at different signal swing widths. This dynamic adaptation helps maintain signal integrity even when signal swing width is reduced for high-speed operation, thereby reducing the impact of external noise.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent incorporates feedback mechanisms that monitor transmission quality and adjust termination settings accordingly. This feedback loop enables the system to compensate for noise effects by optimizing impedance matching in real-time, maintaining reliable transmission despite reduced signal swing width.

Inventive Principle:
Principle #23Feedback

3Device complexity

If multiple memory devices share external resistances for impedance calibration, then device complexity is reduced, but it becomes difficult to identify and manage which devices share which resistances

Engineering Contradiction:
Improveexternal resistance configurationVSAvoiddevice-resistance association identification
Core Design Contradiction:
Device complexityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent introduces an intermediary identification mechanism (such as identification bits or registration protocols) that mediates between memory devices and external resistances. This intermediary system tracks and communicates which devices are associated with which resistances, solving the identification problem while maintaining the shared resistance configuration.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The memory devices perform self-identification and self-registration with their associated external resistances. Each device automatically determines its connection and communicates this information to the system, eliminating the need for complex external management while maintaining accurate device-resistance association tracking.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11121714B2Apparatuses and methods for identifying memory devices of a semiconductor device sharing an external resistance
Publication Date: 2021.09.14 MICRON TECHNOLOGY INC
  • US11121714B2 patent drawing
  • US11121714B2 patent drawing
  • US11121714B2 patent drawing

AI summary

Apparatuses and methods for identifying memory devices of a semiconductor device sharing an external resistance are disclosed. A memory device of a semiconductor device may be set in an identification mode and provide an identification request to other memory devices that are coupled to a common communication channel. The memory devices that are coupled to the common communication channel may share an external resistance, for example, for calibration of respective programmable termination components of the memory devices. The memory devices that receive the identification request set a respective identification flag which can be read to determine which memory devices share an external resistance with the memory device having the set identification mode.