Memoryless Digital Pre-Distortion LUT Training for PA Linearization

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Solution Overview

Problem

Existing digital pre-distortion methods for radio transmitter amplifiers are complex and require multiple steps, including a least squares solution and computation of a Look-up Table (LUT), which increases computational complexity.

Innovation Solution

A high-performance memoryless digital pre-distortion training algorithm that computes an inverse gain per LUT address, directly populating the LUT from input and output waveforms, thereby reducing computational complexity and improving performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If least squares methods are used to solve for LUT coefficients, then the pre-distortion can handle memory effects of wideband power amplifiers, but the computational complexity increases considerably

Engineering Contradiction:
Improveability to handle memory effectsVSAvoidcomputational complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent extracts and addresses only the memoryless component of power amplifier distortion, separating it from memory effects. By focusing solely on the memoryless pre-distortion function and using inverse gain computation per LUT address, the method achieves linearization without the computational burden of least squares methods that would be required to handle memory effects.

Inventive Principle:
Principle #2Taking out (Extraction)

2Measurement precision

If a least squares solution of overdetermined equations is implemented, then the LUT coefficients can be determined, but the implementation complexity increases particularly due to matrix inverse computation

Engineering Contradiction:
ImproveLUT coefficient determinationVSAvoidimplementation complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

Instead of using least squares methods that require solving overdetermined equations and computing matrix inverses, the patent inverts the approach by directly computing the inverse gain at each LUT address. This is done by dividing the desired output by the actual power amplifier output for each input signal level, thereby determining LUT coefficients with significantly reduced computational complexity.

Inventive Principle:
Principle #13The other way round (Inversion)

3Reliability

If two-step process (least squares solution followed by LUT computation) is used, then the pre-distortion training can be completed, but the training time and computational resources increase

Engineering Contradiction:
Improvepre-distortion training completionVSAvoidtraining time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The patent merges the coefficient determination and LUT population steps into a single unified process. By computing the inverse gain directly for each LUT address during the training phase, the method eliminates the need for separate least squares solution and LUT computation steps, thereby reducing training time and computational resource requirements while maintaining reliable pre-distortion training completion.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12316360B2High performance low complexity memoryless digital pre-distortion
Publication Date: 2025.05.27 SAMSUNG ELECTRONICS CO LTD
  • US12316360B2 patent drawing
  • US12316360B2 patent drawing
  • US12316360B2 patent drawing

AI summary

A method of digital memoryless pre-distortion includes receiving an input digital signal from a signal source, calculating a look-up table (LUT) address from the input signal and a power scale, updating an LUT value associated with the LUT address based on the input signal and an output signal that is output from a power amplifier to a wireless communications channel, linearizing the output signal with the updated LUT value, and outputting the output signal to the wireless communications channel. The steps of updating an LUT value associated with the LUT address and linearizing the output signal with the updated LUT value are repeated until a level of linearization is achieved that meets a pre-defined standard.