Variable-Resistance Memory Reference Cell Current Direction Control
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Variable-resistance memory devices face issues with unreliable reference current generation due to high access frequency to reference cells, leading to incorrect write operations and instability in resistance states.
Innovation Solution
A variable-resistance memory device configuration that sets the direction of the read-out current based on the resistance state of the reference cell, using a reversible storage element to generate a reliable reference current without causing resistance changes, employing a memory array with main and reference cells in high or low resistance states, and configuring reference cells in parallel or series to maintain storage states during read operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If reference cells are accessed frequently to generate reference current, then reference current generation capability is improved, but resistance state stability deteriorates due to incorrect write operations
Solution Approach 1:
The patent divides the memory cell into two distinct functional sections: a reference cell section dedicated to generating reference current and a main memory cell section for data storage. This segmentation allows the reference cell to be optimized for reference current generation while the main memory cell maintains data stability, resolving the contradiction between frequent access capability and state stability.
Solution Approach 2:
The patent applies different quality characteristics to different parts of the memory system. The reference cell is designed with specific resistance state characteristics (first and second resistance states) optimized for reference current generation, while the main memory cell maintains stable stored data. This local differentiation allows the reference cell to be accessed frequently without compromising the stability of the main memory cell's stored information.
2Ease of operation
If read current is used for both reading and writing operations, then operation simplicity is improved, but write operation accuracy deteriorates due to incorrect write operations
Solution Approach 1:
The patent dynamically adjusts the resistance state of the reference cell between a first resistance state and a second resistance state based on the required operation. By controlling the reference cell's resistance state dynamically, the system can perform both read and write operations using the same read current path, simplifying operation while ensuring accurate write operations through proper state management.
Solution Approach 2:
The patent changes the resistance state parameter of the reference cell to differentiate between read and write operations. The reference cell is switched between first and second resistance states, which allows the same current path to serve dual purposes: reading data when in one state and writing data when in the other state, thereby maintaining operational simplicity while improving write accuracy.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration ensures more reliable reference current generation and reduces the probability of incorrect write operations, maintaining stable resistance states even with high access frequencies to reference cells.
Implementation Method 1
a storage element with a resistance varying due to application of a signal set at one of different polarities to opposite ends of the storage element
Data Source
AI summary
A variable-resistance memory device includes a memory array section including a main memory cell employing a storage element having a resistance increasing and decreasing in a reversible manner in accordance with application of a signal set at one of different polarities to the opposite ends of the storage element, and a reference cell section including a reference cell provided with a storage element having a resistance increasing and decreasing in a reversible manner in accordance with application of a signal set at one of different polarities to the opposite ends of the storage element and generating a reference current used for recognizing data of the main memory cell. The direction of an applied current serving as the reference current is set in accordance with the resistance state of the reference cell.