Memristive Multiply-Accumulate Circuit for Neural Network Control
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Solution Overview
Problem
As neural network systems grow in size, they require increased memory storage for neuron connection weights and values, leading to reduced computer system performance and increased power consumption due to CPU access from memory.
Innovation Solution
A novel control circuit for neural networks incorporating a multiply accumulate circuit with memristive cells, where word lines are controlled by binary codes of neuron values to generate bitline currents, allowing for analog computation and conversion into output currents without the need for digital-to-analog conversion, thereby optimizing operations and reducing memory access.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If neural network systems grow in size to increase processing capability, then the recognition capability and intelligence are improved, but memory storage requirements increase leading to reduced system performance and increased power consumption
Solution Approach 1:
The patent combines the memory storage function and the multiply-accumulate computation function into a single integrated structure using memristive cells. The memristive cells simultaneously store neuron connection weights and perform analog multiplication operations, eliminating the need for separate memory access operations and reducing the performance penalty associated with large memory storage requirements
2Adaptability or versatility
If neural network systems grow in size to increase processing capability, then the recognition capability and intelligence are improved, but power consumption increases due to increased CPU access from memory
Solution Approach 1:
The patent merges memory and computation in a single location using memristive cells that can store weights and perform analog multiply-accumulate operations simultaneously. This eliminates the energy-consuming data movement between memory and CPU, significantly reducing power consumption while maintaining or enhancing recognition capability
Solution Approach 2:
The patent replaces the traditional digital memory-access-computation mechanism with an analog computation mechanism using memristive cells. The analog nature of the memristive cells allows for direct physical multiplication of voltages and currents, eliminating the need for digital-to-analog conversion and reducing energy consumption associated with digital signal processing
3Ease of operation
If traditional digital computation methods are used for neural network operations, then precise control is achieved, but the need for digital-to-analog conversion increases circuit complexity and reduces efficiency
Solution Approach 1:
The patent substitutes digital computation with analog computation using memristive cells. The analog voltages and currents directly represent neural network values and perform multiplication through physical circuit operations, eliminating the need for digital-to-analog converters and reducing circuit complexity while maintaining computational precision
Solution Approach 2:
The patent changes the operational mode from digital to analog by utilizing the continuous resistance values of memristive cells. This parameter change allows for direct analog computation where voltages and currents can take continuous values, providing precise control without requiring complex digital-to-analog conversion circuits
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution enhances the efficiency of neural network operations by reducing memory access and power consumption, enabling scalable neural network systems with improved performance and energy efficiency.
Implementation Method 1
a first multiply accumulate circuit with n memristive cells
Implementation Method 2
the first multiply accumulate circuit generates plural first bitline currents to the first processor through the first bit line
Data Source
Figure 1
Figure 2A~2B
Figure 2C~3C
AI summary
A control circuit for a neural network system includes a first multiply accumulate circuit, a first neuron value storage circuit and a first processor. The first multiply accumulate circuit includes n memristive cells. The first terminals of the n memristive cells receive a supply voltage. The second terminals of the n memristive cells are connected with a first bit line. The control terminals of the n memristive cells are respectively connected with n word lines. Moreover, n neuron values of a first layer are stored in the first neuron value storage circuit. In an application phase, the first neuron value storage circuit controls the n word lines according to binary codes of the n neuron values. The first processor generates a first neuron value of a second layer.