Memristive Write Circuit for Predictable State Reconfiguration
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Memristor crossbar arrays suffer from leakage currents, limiting scalability, and complementary resistance switches require initialization before each reconfiguration, restricting predictable state reconfiguration.
Innovation Solution
Implement a memristive structure with a two-layer memristive structure and a single-layer memristive structure with strong nonlinear resistive behavior, utilizing bias ramping schemes and writing/reading schemes to achieve predictable and efficient reconfiguration of resistance states without initialization.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If memristor crossbar arrays are used for data processing applications, then device functionality is improved, but leakage currents increase which limits scalability
Solution Approach 1:
The patent converts the harmful leakage current into a useful signal by using it to determine the resistance state of selected memristors. The leakage current that was previously a limiting factor is now utilized to read the state of individual memristors in the crossbar array, enabling both scalability and functionality simultaneously.
Solution Approach 2:
The patent introduces an intermediary read mechanism that uses leakage current as a mediator to detect the resistance state of memristors. By measuring the leakage current through selected memristors during reconfiguration, the system can determine their states without requiring additional read paths, thus maintaining scalability while enabling functionality.
2Object-generated harmful factors
If complementary resistance switches are used to reduce leakage currents, then leakage is reduced, but initialization is required before every reconfiguration step
Solution Approach 1:
The patent enables the memristive structure to determine its own resistance state by measuring leakage current during the reconfiguration process itself. This self-determination eliminates the need for separate initialization steps, as the structure automatically tracks its state through the leakage current measurements taken during normal operation.
Solution Approach 2:
The patent performs preliminary state determination by measuring leakage current before the reconfiguration process begins. This preliminary measurement allows the system to know the initial state of memristors, enabling predictable reconfiguration without requiring a separate initialization step that would otherwise be needed to establish the starting state.
3Ease of operation
If two-layer memristive structure with strong nonlinear resistive behavior is used, then predictable reconfiguration is achieved, but device complexity increases
Solution Approach 1:
The patent achieves predictable reconfiguration by changing the resistance parameter of the memristive structure through controlled application of voltages with different polarities. By adjusting the voltage parameters and their sequence, the system can predictably transition between resistance states without requiring complex multi-layer structures, thus achieving ease of operation with simpler devices.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances scalability by reducing leakage currents and allows for predictable reconfiguration of resistance states in memristive devices, enabling real-number processing with over 100 distinct states and efficient data storage.
Implementation Method 1
a two-layer memristive structure and a single-layer memristive structure with strong nonlinear resistive behavior
Data Source
AI summary
A device includes a memristive element; and a write circuit to write the memristive element into a memristive state of a plurality of memristive states by a write operation, wherein the memristive state has a characteristic flux and/or a characteristic charge; wherein the characteristic flux corresponds to a characteristic voltage drop over the memristive element applied for a saturation time and wherein the characteristic charge corresponds to a characteristic current through the memristive element applied for a saturation time; wherein the write operation includes: causing a write voltage drop over the memristive element that is greater than the characteristic voltage drop associated with the memristive state or causing a write current through the memristive element that is higher than the characteristic write current associated with the memristive state, each for a total write time that is shorter than the saturation time.


