Memristor Crossbar Weight Mapping for Neural Network Hardware
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing neural networks face challenges in efficiently implementing negative weights and adapting to software-level flexibility at the hardware level, leading to undesirable latency and complexity.
Innovation Solution
A neural network system with two sets of weights connected by a mathematical relationship, utilizing memristor crossbars and electronic components, allows for hardware-level implementation with positive weights and software-level training, incorporating excitatory and inhibitory neurons to enhance pattern recognition and learning capabilities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If hardware-based neural networks are constructed to improve computational efficiency, then processing speed is improved, but adaptability to software-level flexibility deteriorates
Solution Approach 1:
The patent segments the neural network implementation into two distinct parts: a hardware-based first set of weights for efficient computational operations and a software-based second set of weights for flexible adaptation. This segmentation allows each component to optimize for its specific function, with the hardware providing speed and the software providing adaptability.
Solution Approach 2:
The patent introduces an intermediary mechanism that bridges the hardware and software weight sets through mathematical relationships. This intermediary allows the system to leverage both the computational efficiency of hardware and the flexibility of software, resolving the contradiction between speed and adaptability.
2Power
If negative weights are implemented in hardware-based neural networks to improve computational capability, then processing capability is improved, but implementation complexity deteriorates
Solution Approach 1:
The patent extracts the negative weight implementation complexity from the hardware layer by placing it in the software layer. The hardware only handles positive weights, which are simpler to implement, while the software component manages the complexity of negative weights through mathematical transformations.
Solution Approach 2:
The patent changes the parameter representation by transforming negative weights into positive weights through mathematical relationships. This parameter transformation allows the hardware to operate with simpler positive values while maintaining the computational capability to handle negative weights through software-based mathematical operations.
3Device complexity
If conventional techniques are used to implement hardware and software steps to avoid negative weight complexity, then implementation complexity is reduced, but latency increases
Solution Approach 1:
The patent merges the hardware and software weight sets into a unified system where both components work together seamlessly. By combining the computational efficiency of hardware with the flexibility of software through mathematical relationships, the system achieves both low complexity and low latency performance.
Solution Approach 2:
The patent performs preliminary mathematical transformations and weight mappings in advance, allowing the hardware to operate efficiently without introducing latency. The software component prepares and transforms weights beforehand, enabling the hardware to execute operations at optimal speed without additional processing delays.
Data Source
AI summary
A neural network system is provided. The neural network system may include an input layer configured to receive an input signal. The neural network system may also include a first set of weights downstream of the input layer. The neural network system may further include a second set of weights downstream of the input layer, the second set of weights being connected by a mathematical relationship to the first set of weights. The neural network system may additionally include an output layer, downstream of the first set of weights and the second set of weights and configured to generate an output signal in response to the input signal.


